| /illumos-gate/usr/src/man/man1/ |
| H A D | w.1 | 146 highest numbered process on the terminal that is not ignoring interrupts, or,
150 interrupts. In cases where no process can be found, \fBw\fR prints
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| H A D | tee.1 | 108 Ignores interrupts.
136 \fB\fB--ignore-interrupts\fR\fR
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| /illumos-gate/usr/src/common/acpica/resources/ |
| H A D | rsirq.c | 174 {ACPI_RSC_BITMASK16,ACPI_RS_OFFSET (Data.Irq.Interrupts[0]),
230 {ACPI_RSC_BITMASK16,ACPI_RS_OFFSET (Data.Irq.Interrupts[0]),
348 {ACPI_RSC_MOVE32, ACPI_RS_OFFSET (Data.ExtendedIrq.Interrupts[0]),
349 AML_OFFSET (ExtendedIrq.Interrupts[0]),
355 ACPI_RS_OFFSET (Data.ExtendedIrq.Interrupts[0]),
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| /illumos-gate/usr/src/uts/common/io/i40e/ |
| H A D | i40e_main.c | 56 * contains logic to enable and disable interrupts on the hardware.
58 * rings to and from interrupts and controls their ability to fire.
60 * There is a big theory statement on interrupts present there.
1180 * Now that we have the priority for the interrupts, initialize in i40e_alloc_trqpairs()
1669 * There are a few constraints on interrupts that we're currently imposing, some
1673 * Currently, to use MSI-X we require two interrupts be available though in
1674 * theory we should participate in IRM and happily use more interrupts.
1677 * don't have MSI-X interrupts available at this time, then we ratchet down the
1704 * MSI or fixed interrupts. in i40e_alloc_intr_handles()
1813 * this off the number of interrupts provided. Furthermore, in i40e_alloc_intrs()
[all …]
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| /illumos-gate/usr/src/uts/common/os/ |
| H A D | softint.c | 39 * Handle software interrupts through 'softcall' mechanism
104 * When CPU is being pinned by higher level interrupts for more than
230 * - CPU is not accepting interrupts in softcall_choose_cpu()
406 * Called to process software interrupts take one off queue, call it,
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| /illumos-gate/usr/src/man/man3head/ |
| H A D | signal.h.3head | 79 \fBsigsend()\fR. Events such as keyboard interrupts generate signals, such as
81 as interrupts; signals generated by interrupts are said to be asynchronously
310 If execution of the signal handler interrupts a blocked function call, the
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| /illumos-gate/usr/src/uts/common/io/ath/ |
| H A D | ath_impl.h | 160 uint32_t ast_hardware; /* fatal hardware error interrupts */
161 uint32_t ast_rxorn; /* rx overrun interrupts */
162 uint32_t ast_rxeol; /* rx eol interrupts */
163 uint32_t ast_txurn; /* tx underrun interrupts */
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| /illumos-gate/usr/src/uts/sun4u/cpu/ |
| H A D | us3_common_asm.S | 193 * Interrupts are disabled to prevent the primary ctx register
208 wrpr %g0, %o5, %pstate /* enable interrupts */
239 wrpr %g0, %o5, %pstate /* enable interrupts */
310 * interrupts or traps can occur during the loop
312 * that interrupts are disabled and this code is
856 * overflow interrupts may be lost causing erroneous performance
1951 * all interrupts while we're changing the registers. We also
1958 wrpr %g0, %g3, %pstate /* interrupts */
2074 wrpr %g0, %g3, %pstate ! turn off interrupts
2344 wrpr %g0, %o2, %pstate ! disable interrupts
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| /illumos-gate/usr/src/uts/sun4u/opl/io/pcicmu/ |
| H A D | pcmu_cb.c | 163 * the interrupts properly. in pcmu_cb_disable_nintr_reg()
225 if (!ino) /* skip non-shared interrupts */ in pcmu_cb_intr_dist()
254 * save the internal interrupts' mapping registers content in pcmu_cb_suspend()
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| /illumos-gate/usr/src/uts/sun4u/io/ |
| H A D | sysiosbus.c | 896 * The "reg" and either an "intr" or "interrupts" properties are required
897 * if the driver wishes to create mappings or field interrupts on behalf
905 * Most new sbus devices post an "interrupts" property that corresponds to
908 * "interrupts on the fusion platform can be treated the same.
910 * The "interrupts" property is assumed to be a list of at least one
1099 * interrupts new (bus-oriented) interrupt spec
1615 cmn_err(CE_PANIC, "%d unclaimed interrupts at " in sbus_intr_wrapper()
1987 * an "interrupts" property, that is equal to the ino number. in sbus_xlate_intrs()
1996 /* Construct ino from slot and interrupts */ in sbus_xlate_intrs()
2108 /* Sbus nexus driver supports only fixed interrupts */ in sbus_intr_ops()
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| /illumos-gate/usr/src/uts/sun4u/serengeti/sys/ |
| H A D | sgsbbc_iosram_priv.h | 57 * Interrupts enabled that SC can send to OS
62 * Interrupts enabled that OS can send to SC
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| /illumos-gate/usr/src/uts/sun4v/os/ |
| H A D | mach_cpu_states.c | 133 * (interrupts are not blocked, the system is not panicking or being in store_boot_cmd()
197 * we are in a normal shutdown sequence (interrupts are not blocked, the
271 * 2) wait for pending interrupts prior to redistribution in mdboot()
407 * we disable further %tick_cmpr interrupts. If not, an explicit call to panic
409 * further level 14 interrupts to be processed once we lower PIL. This allows
506 * Redirect all interrupts to the current CPU. in panic_quiesce_hw()
515 * platforms, interrupts may have arrived while we were in panic_quiesce_hw()
516 * stopped in OBP. OBP will arrange for those interrupts to in panic_quiesce_hw()
519 * (network swap devices), we need interrupts to be in panic_quiesce_hw()
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| /illumos-gate/usr/src/uts/common/io/sata/adapters/si3124/ |
| H A D | si3124.c | 617 * Disable all the interrupts before adding interrupt in si_attach()
618 * handler(s). The interrupts shall be re-enabled selectively in si_attach()
651 "will try Legacy interrupts", NULL); in si_attach()
659 * fixed interrupts are available on the system. in si_attach()
678 "si3124: No interrupts registered", NULL); in si_attach()
818 /* disable the interrupts for an uninterrupted detach */ in si_detach()
843 /* remove the interrupts */ in si_detach()
1916 /* disable the interrupts on the port. */ in si_tran_hotplug_port_deactivate()
2321 * interrupts enabled or disabled.
2380 * Interrupts and timers may not be working properly in a crash dump in si_poll_cmd()
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| /illumos-gate/usr/src/data/amdpmc/ |
| H A D | f17h_zen2_core.json | 173 "summary": "Interrupts Taken",
174 "description": "Counts the number of interrupts taken."
649 … This count includes all processor activity (instructions, exceptions, interrupts, microcode assis…
656 …his includes all types of architectural control flow changes, including exceptions and interrupts."
663 …es those for which prediction is not attempted (far control transfers, exceptions and interrupts)."
670 …his includes all types of architectural control flow changes, including exceptions and interrupts."
684 …ng far call/jump/return, IRET, SYSCALL and SYSRET, plus exceptions and interrupts. Far control tra…
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| /illumos-gate/usr/src/uts/common/sys/usb/hcd/openhci/ |
| H A D | ohcid.h | 57 * information that includes interrupts for which ohci interrupt handler
59 * will be used later in normal mode to service those missed interrupts.
61 * and WriteDoneHead interrupts because of this polled switch.
79 uint_t ohci_curr_intr_sts; /* Current interrupts */
87 uint_t ohci_critical_intr_sts; /* Critical interrupts */
93 * pending when polled code is entered. These missed interrupts &
98 uint_t ohci_missed_intr_sts; /* Missed interrupts */
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| /illumos-gate/usr/src/uts/i86pc/os/cpupm/ |
| H A D | cpu_idle.c | 283 * Toggle interrupt flag to detect pending interrupts. in acpi_cpu_mwait_check_wakeup()
307 * Toggle interrupt flag to detect pending interrupts. in acpi_cpu_mwait_ipi_check_wakeup()
323 * Toggle interrupt flag to detect pending interrupts. in acpi_cpu_check_wakeup()
480 * Disable interrupts here so we will awaken immediately after halting in acpi_cpu_cstate()
488 * We check for the presence of our bit after disabling interrupts. in acpi_cpu_cstate()
497 * acpi_cpu_cstate() must disable interrupts, then check for the bit. in acpi_cpu_cstate()
620 * Reprogram this CPU's LAPIC here before enabling interrupts. in acpi_cpu_cstate()
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| /illumos-gate/usr/src/uts/i86xpv/io/psm/ |
| H A D | xpv_uppc.c | 371 * interrupts should be generated. There is no need to support the periodic
407 * This function will enable timer interrupts.
416 * This function will disable timer interrupts on the current cpu.
802 * It is called with interrupts disabled, and does not enable interrupts.
831 * If new ipl level will enable any pending interrupts, setup so the in xen_uppc_setspl()
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| /illumos-gate/usr/src/man/man9e/ |
| H A D | detach.9e | 56 interrupts.
87 into a quiescent state so that it will not generate interrupts or modify or
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| H A D | gld.9e | 171 \fBgldm_start\fR(\|) enables the device to generate interrupts and prepares the
175 \fBgldm_stop\fR(\|) disables the device from generating any interrupts and
272 possible to share interrupts with other devices, the driver must check the
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| /illumos-gate/usr/src/uts/sun4v/sys/ |
| H A D | ldc.h | 100 int (*add_intr)(); /* interface for adding interrupts */
101 int (*rem_intr)(); /* interface for removing interrupts */
102 int (*clr_intr)(); /* interface for clearing interrupts */
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| /illumos-gate/usr/src/uts/common/io/hxge/ |
| H A D | hxge_hw.c | 160 * logical device interrupts us and then call in hxge_intr()
183 "no interrupts on group %d", t_ldgp->ldg)); in hxge_intr()
211 * Re-arm group interrupts in hxge_intr()
239 * continued interrupts. in hxge_peu_handle_sys_errors()
372 * This interrupt handler is for system error interrupts. in hxge_syserr_intr()
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| /illumos-gate/usr/src/uts/sun4u/io/pci/ |
| H A D | pcisch.c | 131 * The initialization of cb internal interrupts depends on ib in pci_obj_setup()
261 "interrupts", (caddr_t)&intr_buf, &intr_len) != DDI_SUCCESS) in pci_intr_setup()
262 cmn_err(CE_PANIC, "%s%d: no interrupts property\n", in pci_intr_setup()
267 cmn_err(CE_PANIC, "%s%d: <%d interrupts", ddi_driver_name(dip), in pci_intr_setup()
281 if (ndi_prop_update_int_array(DDI_DEV_T_NONE, dip, "interrupts", in pci_intr_setup()
283 cmn_err(CE_PANIC, "%s%d: cannot update interrupts property\n", in pci_intr_setup()
581 * Schizo maps all interrupts in one contiguous area. in ib_intr_map_reg_addr()
608 * return true if there are interrupts using this mapping register
750 * Enable error interrupts. in pbm_configure()
758 * Enable pci streaming byte errors and error interrupts. in pbm_configure()
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| /illumos-gate/usr/src/uts/common/io/sata/adapters/nv_sata/ |
| H A D | nv_sata.c | 327 * Maximum number of consecutive interrupts processed in the loop in the
711 "will try Legacy interrupts"); in nv_attach()
718 * the fixed interrupts are available on the system. in nv_attach()
742 "no interrupts registered", NULL); in nv_attach()
918 * Remove interrupts in nv_detach()
1532 * interrupts and sleep wait on a cv.
1535 * interrupts and must busy wait and simulate the
1536 * interrupts by waiting for BSY to be cleared.
2003 * disable the interrupts on port in nv_sata_deactivate()
2522 * clear any previous interrupts asserted in mcp5x_reg_init()
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| /illumos-gate/usr/src/uts/common/io/virtio/ |
| H A D | virtio.h | 101 * the running state (DRIVER_OK). The framework will allocate any interrupts
181 * may not actually stop interrupts from the device in a timely fashion.
191 * virtio_interrupts_enable() routine may be called. Interrupts may be
268 * To tear down resources (e.g., interrupts and allocated memory) the client
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| /illumos-gate/usr/src/uts/common/io/sfxge/common/ |
| H A D | efx_intr.c | 314 * Under legacy interrupts, don't share a level between fatal in siena_intr_init()
315 * interrupts and event queue interrupts. Under MSI-X, they in siena_intr_init()
324 /* Enable all the genuinely fatal interrupts */ in siena_intr_init()
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