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/titanic_52/usr/src/man/man9f/
H A Dddi_add_softintr.9f9 ddi_trigger_softintr \- software interrupt handling routines
47 interrupt interfaces referenced in \fBIntro\fR(9F). Refer to \fIWriting Device
68 The type of soft interrupt to retrieve the cookie for.
77 Pointer to a location to store the interrupt block cookie.
98 A hint value describing the type of soft interrupt to generate.
107 Pointer to a soft interrupt identifier where a returned soft interrupt
117 Optional pointer to an interrupt block cookie where a returned interrupt block
127 Optional pointer to an interrupt devic
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H A Dddi_intr_add_softint.9f9 ddi_intr_get_softint_pri, ddi_intr_set_softint_pri \- software interrupt
72 Pointer to the DDI soft interrupt handle
81 Priority to associate with a soft interrupt
90 Pointer to soft interrupt handler
99 Argument for the soft interrupt handler
111 DDI soft interrupt handle
120 Additional argument for the soft interrupt handler
132 DDI soft interrupt handle
144 DDI soft interrupt handle
153 Soft interrupt priorit
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H A Dddi_add_intr.9f8 ddi_add_intr, ddi_get_iblock_cookie, ddi_remove_intr \- hardware interrupt
43 interrupt interfaces referenced in \fBIntro\fR(9F). Refer to \fIWriting Device
64 Interrupt number.
73 Pointer to an interrupt block cookie.
94 Interrupt number.
103 Optional pointer to an interrupt block cookie where a returned interrupt block
113 Optional pointer to an interrupt device cookie where a returned interrupt
123 Pointer to interrupt handle
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H A Dddi_intr_enable.9f9 ddi_intr_block_disable \- enable or disable a given interrupt or range of
53 DDI interrupt handle
65 Pointer to an array of DDI interrupt handles
86 DDI interrupt handle
98 Pointer to an array of DDI interrupt handles
113 The \fBddi_intr_enable()\fR function enables the interrupt given by the
114 interrupt handle \fIh\fR.
119 least \fB1\fR and \fIh_array\fR is pointer to a count-sized array of interrupt
126 \fBDDI_INTR_FLAG_BLOCK\fR if the device or host bridge supports the interrupt
127 block enable/disable feature for the given interrupt typ
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H A Dddi_intr_dup_handler.9f8 ddi_intr_dup_handler \- reuse interrupt handler and arguments for MSI-X
33 Original DDI interrupt handle
42 Interrupt number to duplicate
51 Pointer to new DDI interrupt handle
58 that allows an unallocated interrupt vector of a device to use a previously
59 initialized or added primary MSI-X interrupt vector in order to share the same
60 vector address, vector data, interrupt handler, and handler arguments. This
62 Operating System to the unallocated interrupt vectors on an associated device.
69 interrupt handle has been added to the system or enabled by
71 respectively. If successful, the function returns the new interrupt handl
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H A Dddi_intr_add_handler.9f8 ddi_intr_add_handler, ddi_intr_remove_handler \- add or remove interrupt
44 Pointer to the DDI interrupt handle
53 Pointer to interrupt handler
62 First argument for the interrupt handler
71 Second, optional, argument for the interrupt handler
83 DDI interrupt handle
89 The \fBddi_intr_add_handler()\fR function adds an interrupt handler given by
91 \fIarg1\fR and \fIarg2\fR for the previously allocated interrupt handle
93 passed as the first and second arguments, respectively, to the interrupt
95 interrupt handle
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H A Dddi_cb_register.9f121 The device driver participates in interrupt resource management. The device
122 driver may receive additional interrupt resources from the system, but only
125 attached. Interrupt availability varies based on the overall needs of the
159 For interrupt resource management, the driver has more available interrupts.
160 The driver can allocate more interrupt vectors and then set up more interrupt
170 For interrupt resource management, the driver has fewer available interrupts.
189 If a driver participates in interrupt resource management, it must register a
192 interrupt availability has changed. The callback handler should use the
193 interrupt function
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H A Dddi_intr_alloc.9f9 interrupt type
50 Pointer to an array of DDI interrupt handles
59 Interrupt type
68 Interrupt number
109 DDI interrupt handle
115 The \fBddi_intr_alloc()\fR function allocates interrupts of the interrupt type
116 given by the \fItype\fR argument beginning at the interrupt number \fIinum\fR.
119 argument and returns the number of interrupt handles in the interrupt handle
123 Specific interrupts are always specified by the combination of interrupt
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H A Dusb_pipe_intr_xfer.9f8 usb_pipe_intr_xfer, usb_pipe_stop_intr_polling \- USB interrupt transfer and
40 Interrupt pipe handle on which request is made.
49 Pointer to interrupt transfer request.
72 Interrupt pipe handle on which to stop polling for data.
88 a transfer through a USB interrupt pipe. The request is passed to the host
93 There are three categories of interrupt transfers: periodic or polled
94 interrupt-IN, single-transfer interrupt-IN, and (single-transfer)
95 interrupt-OUT.
96 .SS "Periodic Interrupt
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H A Dddi_intr_get_cap.9f8 ddi_intr_get_cap, ddi_intr_set_cap \- get or set interrupt capabilities for a
9 given interrupt type
40 DDI interrupt handle
61 DDI interrupt handle
76 The \fBddi_intr_get_cap()\fR function returns the interrupt capability flags
77 for the interrupt handle \fIh\fR. Upon a successful return, the flags are
90 interrupt types. This is a read-write (RW) flag.
101 \fBDDI_INTR_TYPE_MSIX\fR interrupt types.
110 The interrupt can be masked either by the device or by the host bridge, or
120 The interrupt support
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H A Dddi_intr_hilevel.9f8 ddi_intr_hilevel \- indicate interrupt handler type
24 interrupt interfaces referenced in \fBIntro\fR(9F). Refer to \fIWriting Device
42 Interrupt number.
49 interrupt is a "high level" interrupt.
57 In addition, high level interrupt handlers must take care to do a minimum of
61 A typical high level interrupt handler would put data into a circular buffer
62 and schedule a soft interrupt by calling \fBddi_trigger_softintr()\fR. The
64 initialized for the interrupt handler.
68 \fBddi_add_intr()\fR to decide which type of interrupt handle
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/titanic_52/usr/src/uts/common/sys/
H A Dddi_intr.h29 * Sun DDI interrupt support definitions
43 * Interrupt related definitions.
48 * the the caller requested interrupt number to be added does not
51 #define DDI_INTR_NOTFOUND 1 /* interrupt not found error */
54 * For use by driver interrupt service routines to return to the
55 * system whether an interrupt was for the driver or not.
60 /* Hardware interrupt types */
65 /* Hardware interrupt priority must be a number within these min/max values */
73 /* Used in calls to allocate soft interrupt priority. */
77 * Interrupt flag
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/titanic_52/usr/src/boot/sys/boot/fdt/dts/arm/
H A Dimx53x.dtsi72 tzic: tz-interrupt-controller@0fffc000 {
74 interrupt-controller;
75 #interrupt-cells = <1>;
97 interrupt-parent = <&tzic>;
104 interrupt-parent = <&tzic>;
118 interrupt-parent = <&tzic>;
131 interrupt-parent = <&tzic>;
136 interrupt-controller;
137 #interrupt-cells = <1>;
144 interrupt
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H A Dimx51x.dtsi70 tzic: tz-interrupt-controller@e0000000 {
72 interrupt-controller;
73 #interrupt-cells = <1>;
95 interrupt-parent = <&tzic>;
102 interrupt-parent = <&tzic>;
116 interrupt-parent = <&tzic>;
129 interrupt-parent = <&tzic>;
134 interrupt-controller;
135 #interrupt-cells = <1>;
142 interrupt
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H A Dexynos5.dtsi33 interrupt-parent = <&GIC>;
58 GIC: interrupt-controller@10481000 {
62 interrupt-controller;
64 #interrupt-cells = <1>;
67 combiner: interrupt-controller@10440000 {
74 interrupt-parent = <&GIC>;
92 interrupt-parent = <&GIC>;
99 interrupt-parent = <&GIC>;
127 interrupt-parent = <&GIC>;
136 interrupt
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H A Dvybrid.dtsi35 interrupt-parent = <&GIC>;
70 GIC: interrupt-controller@01c81000 {
74 interrupt-controller;
75 #interrupt-cells = <1>;
97 interrupt-parent = < &GIC >;
113 interrupt-parent = <&GIC>;
123 interrupt-parent = <&GIC>;
132 interrupt-parent = <&GIC>;
140 interrupt-parent = <&GIC>;
153 interrupt
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H A Dam335x.dtsi33 interrupt-parent = <&AINTC>;
42 AINTC: interrupt-controller@48200000 {
44 interrupt-controller;
46 #interrupt-cells = <1>;
80 interrupt-parent = <&AINTC>;
87 interrupt-parent = <&AINTC>;
94 interrupt-parent = <&AINTC>;
101 interrupt-parent = <&AINTC>;
113 interrupt-parent = <&AINTC>;
114 interrupt
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H A Dimx6.dtsi63 interrupt-parent = <&gic>;
66 gic: generic-interrupt-controller@00a00100 {
68 interrupt-controller;
69 #interrupt-cells = <1>;
79 interrupt-parent = <&gic>;
87 interrupt-parent = < &gic >;
94 interrupt-parent = <&gic>;
114 interrupt-parent = <&gic>;
122 interrupt-parent = <&gic>;
129 interrupt
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H A Dversatilepb.dts18 intc: interrupt-controller {
22 interrupt-controller;
23 #interrupt-cells = <1>;
26 sic: secondary-interrupt-controller {
30 interrupt-controller;
31 #interrupt-cells = <1>;
38 interrupt-parent = <&intc>;
47 interrupt-parent = <&intc>;
56 interrupt-parent = <&intc>;
65 interrupt
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/titanic_52/usr/src/man/man9s/
H A Dkstat_intr.9s8 kstat_intr \- structure for interrupt kstats
25 Interrupt statistics are kept in the \fBkstat_intr\fR structure. When
26 \fBkstat_create\fR(9F) creates an interrupt \fBkstat\fR, the \fBks_data\fR
38 An interrupt is a hard interrupt (sourced from the hardware device itself), a
39 soft interrupt (induced by the system through the use of some system interrupt
40 source), a watchdog interrupt (induced by a periodic timer call), spurious (an
41 interrupt entry point was entered but there was no interrupt t
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/titanic_52/usr/src/boot/sys/boot/fdt/dts/powerpc/
H A Dp2020ds.dts107 interrupt-parent = <&mpic>;
228 interrupt-parent = <&mpic>;
234 interrupt-parent = <&mpic>;
245 interrupt-parent = <&mpic>;
256 interrupt-parent = <&mpic>;
267 interrupt-parent = <&mpic>;
277 interrupt-parent = <&mpic>;
284 interrupt-parent = <&mpic>;
298 interrupt-parent = <&mpic>;
305 interrupt
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/titanic_52/usr/src/uts/common/io/1394/adapters/
H A Dhci1394_isr.c28 * Contains the core interrupt handling logic for the hci1394 driver.
29 * It also contains the routine which sets up the initial interrupt
57 * Get the iblock_cookie, make sure we are not using a high level interrupt,
58 * register our interrupt service routine.
69 /* This driver does not support running at a high level interrupt */ in hci1394_isr_init()
80 /* There should only be 1 1394 interrupt for an OpenHCI adapter */ in hci1394_isr_init()
99 * un-register our interrupt service routine.
116 * register our interrupt service routine.
125 /* Initialize interrupt handler */ in hci1394_isr_handler_init()
140 * un-register our interrupt servic
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/titanic_52/usr/src/uts/common/io/i40e/
H A Di40e_intr.c19 * Interrupt Handling Theory
32 * interrupt. Note, we may need to do more here eventually. To re-enable the
42 * tx operations. This file is dedicated to handling and dealing with interrupt
52 * restricts us to only using a single interrupt, which isn't the interesting
57 * Interrupt Management
63 * interrupt vectors.
66 * mapped to the same interrupt. When the interrupt fires, we'll have to check
68 * interrupt is claimed.
74 * maintain a linked list of queues for each interrupt vecto
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/titanic_52/usr/src/uts/i86pc/os/
H A Dintr.c28 * To understand the present state of interrupt handling on i86pc, we must
29 * first consider the history of interrupt controllers and our way of handling
32 * History of Interrupt Controllers on i86pc
37 * The first interrupt controller that attained widespread use on i86pc was
38 * the Intel 8259(A) Programmable Interrupt Controller that first saw use with
39 * the 8086. It took up to 8 interrupt sources and combined them into one
46 * Intel Advanced Programmable Interrupt Controller (APIC)
49 * microarchitecture (i686) Intel introduced a new interrupt controller.
58 * Instead of talking directly to 8259 for status, sending End Of Interrupt
64 * The number of addressable interrupt vector
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/titanic_52/usr/src/lib/libsqlite/test/
H A Dinterrupt.test17 # $Id: interrupt.test,v 1.4.2.1 2004/05/10 20:27:42 drh Exp $
39 # interrupt a progressively later and later points during the processing
69 do_test interrupt-1.1 {
75 interrupt_test interrupt-1.2 {DROP TABLE t1} {} 1 14
76 do_test interrupt-1.3 {
81 integrity_check interrupt-1.4
101 interrupt_test interrupt-2.2 {VACUUM} {} 100
102 do_test interrupt-2.3 {
107 do_test interrupt-2.4 {
110 integrity_check interrupt
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