/titanic_53/usr/src/uts/sparc/dtrace/ |
H A D | dtrace_isa.c | 99 * don't fire through an interrupt source.) This parameter is used to 309 * Hop from interrupt stack to thread stack. in dtrace_getpcstack() 322 * bounds implied by %g7 -- interrupt thread in dtrace_getpcstack() 327 * from a high-level interrupt that has occurred in dtrace_getpcstack() 330 * high-level interrupt has in turn interrupted in dtrace_getpcstack() 331 * a non-passivated interrupt thread, we in dtrace_getpcstack() 335 * interrupt -- but because cpu_intr_actv is in dtrace_getpcstack() 721 * Hop from interrupt stack to thread stack. in dtrace_getstackdepth()
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/titanic_53/usr/src/uts/sun4u/io/i2c/nexus/ |
H A D | pcf8584.c | 29 * implementations. It supports both interrupt and polled 30 * mode operation, but defaults to interrupt. 184 * PIL level to associate with each of its interrupt properties. Most 302 "interrupt-priorities"); in pcf8584_dodetach() 349 "interrupt-priorities") != 1) { in pcf8584_doattach() 351 DDI_PROP_CANSLEEP, "interrupt-priorities", in pcf8584_doattach() 382 cmn_err(CE_WARN, "%s failed to add interrupt", in pcf8584_doattach() 831 * is no interrupt after the stop bit is written, so this 1136 * pcf8584_intr() is the interrupt service routine registered during 1187 * Interrupt occurs after a byte is transmitted or received, indicating [all …]
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/titanic_53/usr/src/cmd/prctl/ |
H A D | prctl.c | 84 static volatile int interrupt; variable 423 /* allow user interrupt */ in main() 424 if (interrupt) { in main() 668 while (--argc >= 0 && !interrupt) { in main() 743 if (interrupt) in main() 778 if (interrupt) in main() 813 if (interrupt) in main() 843 if (interrupt) in main() 906 if (interrupt) in main() 1044 /* handle user interrupt of getting rctls */ in main() [all …]
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/titanic_53/usr/src/grub/grub-0.97/netboot/ |
H A D | e1000_hw.h | 328 /* This defines the bits that are set in the Interrupt Mask 337 /* This defines the bits that are set in the Interrupt Mask 339 * o RXT0 = Receiver Timer Interrupt (ring 0) 577 #define E1000_ICR 0x000C0 /* Interrupt Cause Read - R/clr */ 578 #define E1000_ITR 0x000C4 /* Interrupt Throttling Rate - RW */ 579 #define E1000_ICS 0x000C8 /* Interrupt Cause Set - WO */ 580 #define E1000_IMS 0x000D0 /* Interrupt Mask Set - RW */ 581 #define E1000_IMC 0x000D8 /* Interrupt Mask Clear - WO */ 601 #define E1000_RADV 0x0282C /* RX Interrupt Absolute Delay Timer - RW */ 614 #define E1000_TIDV 0x03820 /* TX Interrupt Delay Value - RW */ [all …]
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/titanic_53/usr/src/uts/common/sys/ |
H A D | mac_flow.h | 109 * Tx interrupt. 126 * interrupt cpu: mrp_intr_cpu less than 0 implies platform limitation 127 * in retargetting the interrupt assignment.
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H A D | autoconf.h | 107 #define DDI_INTR_API 0x0200 /* interrupt interface messages */ 108 #define DDI_INTR_IMPL 0x0400 /* interrupt implementation msgs */ 109 #define DDI_INTR_NEXUS 0x0800 /* interrupt messages from nexuses */ 115 #define DDI_INTR_IRM 0x20000 /* interrupt resource management */
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/titanic_53/usr/src/uts/common/sys/usb/usba/ |
H A D | hcdi.h | 117 * do interrupt pipe read/write 125 * stop interrupt pipe polling 231 * function to duplicate a interrupt/isoc request (for HCD)
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/titanic_53/usr/src/man/man9f/ |
H A D | ddi_dmae.9f | 224 function is called (with the argument \fIarg\fR) from interrupt context. When 331 If \fBddi_dmae_alloc()\fR is called from interrupt context, then its 334 interrupt, or kernel context.
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H A D | csx_AccessConfigurationRegister.9f | 119 of interrupt request generated by the \fBPC \fRCard or place the card in the 121 the register to determine the appropriate setting for the interrupt mode (Bit
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/titanic_53/usr/src/man/man9s/ |
H A D | ddi_dmae_req.9s | 89 a fixed-length scatter/gather list, or by an interrupt chaining feature. A 150 called from a high-level interrupt routine. If the cookies were not prefetched, 152 from a high-level interrupt routine, which is not
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/titanic_53/usr/src/uts/sun/sys/ |
H A D | socalreg.h | 123 uint_t int_pending:1; /* Interrupt Pending. */ 158 * Define SOC Interrupt Mask Register Bits. 228 uint32_t socal_imr; /* Interrupt Mask reg */
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/titanic_53/usr/src/uts/common/io/nxge/ |
H A D | nxge.conf | 80 # Interrupt after this number of packets have arrived since 84 # Default Interrupt Blanking parameters: 89 # To turn off interrupt blanking, use the minimum values for both
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/titanic_53/usr/src/uts/common/io/vr/ |
H A D | vr.c | 72 * interrupt which is generated 3 times per ring at minimum. 343 * Add interrupt to the OS. in vr_attach() 359 * Enable interrupt. in vr_attach() 467 * Add an interrupt for our device to the OS. 510 * Remove our interrupt from the OS. 1177 * Interrupt service routine 1181 * twice for each interrupt. 1199 * If the driver is not in running state it is not our interrupt. in vr_intr() 1208 * Read the status register to see if the interrupt is from our device in vr_intr() 1215 * The interrupt was not generated by our device. in vr_intr() [all …]
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/titanic_53/usr/src/uts/common/io/atge/ |
H A D | atge_main.c | 486 /* Configure interrupt moderation timer. */ in atge_mac_config() 491 * We don't want to automatic interrupt clear as task queue in atge_mac_config() 492 * for the interrupt should know interrupt status. in atge_mac_config() 586 * Adds interrupt handler depending upon the type of interrupt supported by 663 * Add interrupt handler now. in atge_add_intr_handler() 791 * Adds interrupt handler depending on the supported interrupt type by the 800 * Get the supported interrupt types. in atge_add_intr() 817 ATGE_DB(("%s: Using MSIx for interrupt", in atge_add_intr() 826 ATGE_DB(("%s: Using MSI for interrupt", in atge_add_intr() 836 ATGE_DB(("%s: Using FIXED type for interrupt", in atge_add_intr() [all …]
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/titanic_53/usr/src/uts/common/os/ |
H A D | ddifm.c | 55 * by the interrupt iblock cookie returned during initialization. 106 * context subject to the constraints specified by the interrupt 369 * interrupt context. in fm_dev_ereport_postv() 476 * from user, kernel, interrupt or high-interrupt context. Otherwise, 568 * to interrupt only. in ddi_fm_handler_register() 623 * to interrupt only. in ddi_fm_handler_unregister() 868 * This function may be called from user, kernel, or interrupt context. 884 * These routines may be called from user, kernel, and interrupt contexts.
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/titanic_53/usr/src/uts/common/io/iprb/ |
H A D | iprb.h | 169 #define STS_SWI 0x04 /* software interrupt */ 195 #define INTCTL_SI 0x02 /* generate software interrupt */ 217 #define MDI_IE 0x20000000 /* interrupt enable */ 305 #define CB_CMD_I 0x2000 /* generate an interrupt */
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/titanic_53/usr/src/uts/common/io/hxge/ |
H A D | hxge_vmac.c | 84 /* Clear the interrupt status registers */ in hxge_vmac_init() 89 * Take the masks off the overflow counters. Interrupt the system when in hxge_vmac_init() 90 * any counts overflow. Don't interrupt the system for each frame. in hxge_vmac_init() 326 /* Clear the interrupt status registers */ in hxge_vmac_intr()
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/titanic_53/usr/src/uts/sun4u/io/px/ |
H A D | px_lib4u.h | 36 #define H_ENOINTR 1 /* Invalid interrupt id */ 48 * Interrupt blocks and other register bases. 96 sysino_t hp_sysino; /* Oberon hotplug interrupt */ 223 /* Interrupt states */
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/titanic_53/usr/src/uts/sun4v/io/ |
H A D | ldc.c | 96 /* Interrupt handling functions */ 783 /* check Tx interrupt */ in i_ldc_clear_intr() 791 /* check Rx interrupt */ in i_ldc_clear_intr() 1018 * LDC receive interrupt handler 1032 /* Get the channel for which interrupt was received */ in i_ldc_rx_hdlr() 1049 /* Mark the interrupt as being actively handled */ in i_ldc_rx_hdlr() 1057 * the interrupt. Otherwise, the ldc_read will clear in i_ldc_rx_hdlr() 1059 * interrupt has not yet been cleared, it is marked in i_ldc_rx_hdlr() 1090 * empty, we mark the interrupt as pending to in i_ldc_rx_hdlr() 1098 * queue. Clear the interrupt. in i_ldc_rx_hdlr() [all …]
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/titanic_53/usr/src/uts/common/io/ib/adapters/tavor/ |
H A D | tavor_misc.c | 313 * Context: Can be called from interrupt or base context. 373 * Context: Can be called from interrupt or base context. 508 * Context: Can be called from interrupt or base context. 1165 * Context: Can be called from interrupt or base context. 1181 * Context: Can be called from interrupt or base context. 1197 * Context: Can be called from interrupt or base context. 1265 * Context: Can be called from interrupt or base context. 1302 * Context: Can be called from interrupt or base context. 1361 * Context: Can be called from interrupt or base context. 1618 * Context: Can be called from interrupt or base context. [all …]
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/titanic_53/usr/src/uts/sun4u/daktari/io/ |
H A D | hpc3130_dak.c | 783 "interrupt-priorities", (caddr_t)&hpc3130_pil, in hpc3130_do_attach() 789 cmn_err(CE_WARN, "High level interrupt not supported"); in hpc3130_do_attach() 957 cmn_err(CE_WARN, "failed to add interrupt"); in hpc3130_do_attach() 1251 * When the TI 3130 produces an interrupt, 1257 uint8_t interrupt; in hpc3130_hard_intr() local 1275 * Read the interrupt event register - see in hpc3130_hard_intr() 1279 &interrupt)) { in hpc3130_hard_intr() 1283 if (interrupt == 0) in hpc3130_hard_intr() 1293 if (interrupt & HPC3130_PWRGOOD) { in hpc3130_hard_intr() 1302 if (interrupt & HPC3130_DETECT0) { in hpc3130_hard_intr() [all …]
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/titanic_53/usr/src/uts/common/sys/nxge/ |
H A D | nxge_hw.h | 301 * Logical Device Interrupt Mask 0 309 * Logical Device Interrupt Mask 1 315 /* For Lofical Device Interrupt Mask 0 and 1 */ 339 * Logical Device Group Interrupt Management 372 * Logical Device Group Interrupt Timer Resolution 399 * System Interrupt Data
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/titanic_53/usr/src/uts/sun4/os/ |
H A D | mp_call.c | 40 * Interrupt another CPU. 86 * interrupt each other. in cpu_call()
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/titanic_53/usr/src/uts/sun4v/sys/ |
H A D | machintreg.h | 40 #define IGN_SIZE 5 /* Interrupt Group Number bit size */ 62 * capacity for ~4096 interrupts to the system interrupt table.
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/titanic_53/usr/src/man/man3volmgt/ |
H A D | volmgt_symname.3volmgt | 71 An interrupt signal was detected while trying to convert the supplied 94 An interrupt signal was detected while trying to convert the supplied
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