| /titanic_52/usr/src/uts/intel/sys/acpi/platform/ |
| H A D | acwin64.h | 60 * 1) Interrupt 3 is used to break into a debugger
|
| /titanic_52/usr/src/uts/i86pc/io/pci/ |
| H A D | pci_common.h | 94 * Interrupt related declaration
|
| /titanic_52/usr/src/cmd/mdb/i86pc/modules/pcplusmp/ |
| H A D | pcplusmp.c | 36 * Dump interrupt information for pcplusmp PSM.
|
| /titanic_52/usr/src/uts/sun4u/opl/sys/ |
| H A D | dm2s.h | 49 ddi_iblock_cookie_t ms_ibcookie; /* Interrupt block cookie */
|
| /titanic_52/usr/src/contrib/ast/src/lib/libpp/ |
| H A D | pp.key | 81 interrupt . _,__ microsoft
|
| /titanic_52/usr/src/man/man9f/ |
| H A D | ddi_check_acc_handle.9f | 130 be called from user, kernel, or interrupt context.
|
| H A D | ddi_strtol.9f | 149 The \fBddi_strtol()\fR function may be called from user, kernel or interrupt
|
| H A D | ddi_umem_alloc.9f | 157 For driver interrupt routines.
|
| H A D | kstat_create.9f | 97 Interrupt; only one data record per \fBkstat\fR.
|
| H A D | ddi_strtoul.9f | 149 The \fBddi_strtoul()\fR function may be called from user, kernel or interrupt
|
| H A D | mkiocb.9f | 152 The \fBmkiocb()\fR function can be called from user, interrupt, or kernel
|
| /titanic_52/usr/src/cmd/bnu/ |
| H A D | dial.h | 52 #define INTRPT (-1) /* interrupt occured */
|
| /titanic_52/usr/src/lib/libbc/inc/include/net/ |
| H A D | if_arp.h | 88 int (*ef_netisr)(); /* soft interrupt function */
|
| /titanic_52/usr/src/uts/sun4v/ml/ |
| H A D | mach_locore.s | 89 * With new bus structures supporting a larger number of interrupt
90 * numbers, the interrupt vector table, intr_vec_table[] has been
95 intr_vec_table = SYSBASE32 + PAGESIZE + PANICBUFSIZE ! address of interrupt table
960 mov %l6, %o0 ! pass original interrupt level
1211 rdpr %otherwin, %g1 ! re-read in case of interrupt
1395 ! to ptl1_panic in case the interrupt handler causes a panic.
|
| /titanic_52/usr/src/cmd/truss/ |
| H A D | fcall.c | 364 if (interrupt|sigusr1) in object_iter()
367 if (interrupt|sigusr1) in object_iter()
391 return (interrupt | sigusr1); in object_iter()
537 if (interrupt|sigusr1) in symbol_iter()
566 return (interrupt | sigusr1); in symbol_iter()
1643 return (interrupt | sigusr1); in lwp_stack_traps()
1662 return (interrupt | sigusr1); in thr_stack_traps()
|
| /titanic_52/usr/src/cmd/lockstat/ |
| H A D | lockstat.c | 204 { 'I', "CPU+PIL", "Profiling interrupt", "nsec",
280 " -I watch interrupt events [off by default]\n" in usage()
285 " -i rate interrupt rate for -I [default: %d Hz]\n" in usage()
315 show_events('I', "Interrupt"); in usage()
638 * For interrupt events, arg0 (normally the lock pointer) is in dprog_addevent()
1108 fail(0, "max interrupt rate is %d Hz", MAX_HZ); in main()
1112 "Profiling interrupt") == 0) in main()
|
| /titanic_52/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/ |
| H A D | clc.h | 338 /* Called due to interrupt. It determines the link, speed */
521 /* elink_link_update should be called upon link interrupt */
557 interrupt */
|
| /titanic_52/usr/src/cmd/vi/port/ |
| H A D | ex.c | 50 * ex.c Entry point and routines handling interrupt, hangup
165 * get messed up if an interrupt comes in quickly. in main()
233 * Initialize interrupt handling. in main()
|
| /titanic_52/usr/src/uts/common/disp/ |
| H A D | disp.c | 94 pri_t intr_pri; /* interrupt thread priority base level */
106 * If this is set, only interrupt threads will cause kernel preemptions.
108 * will either be the max sysclass pri or the min interrupt pri.
189 * compute new interrupt thread base priority in disp_setup()
761 * interrupt threads, which will be the only threads on the CPU's own in disp()
878 * We are an interrupt thread. Setup and return in swtch()
1985 * halted, or busy servicing an interrupt), in disp_getwork()
2439 * If an interrupt thread is busy, but the in disp_bound_common()
2494 * to the given processor, including interrupt threads.
|
| /titanic_52/usr/src/uts/common/os/ |
| H A D | cpu_intr.c | 113 * of I/O interrupt participation. This also permits the
|
| /titanic_52/usr/src/common/nvpair/ |
| H A D | nvpair_alloc_fixed.c | 46 * This allocator is designed for the usage in interrupt context when
|
| /titanic_52/usr/src/uts/sun4u/serengeti/sys/ |
| H A D | sgsbbc_iosram_priv.h | 128 * interrupt handlers
|
| /titanic_52/usr/src/uts/sun4v/os/ |
| H A D | cpc_subr.c | 48 uint64_t cpc_level15_inum = 0; /* used in interrupt.s */
|
| /titanic_52/usr/src/uts/sun4u/sys/pci/ |
| H A D | pci_cb.h | 67 pci_ign_t cb_ign; /* 1st-attached-side interrupt grp# */
|
| /titanic_52/usr/src/uts/i86pc/sys/ |
| H A D | psm_common.h | 72 * referencing an interrupt link device the configured irq for the device.
|