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/titanic_51/usr/src/man/man9f/
H A Dputnextctl.9f71 The \fBputnextctl()\fR function can be user, interrupt, or kernel context.
H A Dscsi_probe.9f158 from interrupt context, because it can sleep waiting for memory to be
H A Dstrlog.9f166 The \fBstrlog()\fR function can be called from user, interrupt, or kernel
H A Ddlbindack.9f197 All \fBDLPI\fR helper functions can be called from user, interrupt, or kernel
H A Dnvpair_value_byte.9f228 These functions can be called from user, interrupt, or kernel context.
H A Dbcopy.9f72 The \fBbcopy()\fR function can be called from user, interrupt, or kernel
H A Dcopyb.9f48 The \fBcopyb()\fR function can be called from user, interrupt, or kernel
H A Dddi_device_copy.9f188 \fBddi_device_copy()\fR can be called from user, kernel, or interrupt context.
H A Dddi_get_devstate.9f94 interrupt context.
H A Dddi_map_regs.9f168 These functions can be called from user, interrupt, or kernel context.
/titanic_51/usr/src/man/man9e/
H A Dtran_reset.9e134 The \fBtran_reset()\fR function can be called from user or interrupt context.
/titanic_51/usr/src/boot/sys/boot/i386/btx/lib/
H A Dbtxv86.s46 .set INT_V86,0x31 # Interrupt number
/titanic_51/usr/src/uts/common/io/tpm/
H A Dtpm_ddi.h86 * For supporting the interrupt
/titanic_51/usr/src/uts/intel/io/dktp/controller/ata/
H A Dfsm.txt31 * The interrupt reason can be interpreted
/titanic_51/usr/src/uts/common/io/
H A Dpic.c72 /* OCW1: set interrupt mask */ in picsetup()
/titanic_51/usr/src/uts/sun4u/opl/sys/pcicmu/
H A Dpcmu_cb.h49 pcmu_ign_t pcb_ign; /* interrupt grp# */
/titanic_51/usr/src/uts/sun4u/javelin/sys/
H A Denvctrltwo.h61 ddi_iblock_cookie_t ic_trap_cookie; /* interrupt cookie */
/titanic_51/usr/src/lib/libcurses/screen/
H A Draw.c55 /* Disable interrupt characters */ in raw()
/titanic_51/usr/src/uts/common/sys/
H A Dttychars.h50 char tc_intrc; /* interrupt */
H A Dpcie.h85 #define PCIE_PCIECAP_INT_MSG_NUM 0x3E00 /* Interrupt Message Number */
309 #define PCIE_SLOTCTL_CMD_INTR_EN 0x10 /* CMD Completed Interrupt En */
310 #define PCIE_SLOTCTL_HP_INTR_EN 0x20 /* Hot-Plug Interrupt Enable */
356 #define PCIE_ROOTCTL_PME_INTERRUPT_EN 0x8 /* PME Interrupt Enable */
/titanic_51/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A Dlm_sb.c42 /* Reads IGU interrupt status register MSB / LSB */
61 /* Reads IGU interrupt status register MSB / LSB */
729 /* set interrupt coalesing parameters.
730 - these settings are derived from user configured interrupt coalesing mode and tx/rx interrupts rate (lm params).
895 // interrupt ack in lm_int_hc_ack_sb()
1143 DbgBreakMsg("Wrong Interrupt Mode\n"); in lm_enable_hc_int()
1190 DbgMessage(pdev, FATAL, "VF can't enable igu interrupt\n"); in lm_enable_igu_int()
1220 DbgBreakMsg("Wrong Interrupt Mode\n"); in lm_enable_igu_int()
/titanic_51/usr/src/uts/sun4u/io/pci/
H A Dpci_tools.c282 * Get interrupt information for a given ino.
510 /* Main function for handling interrupt CPU binding requests and queries. */
520 /* Get system interrupt information. */ in pcitool_intr_admn()
525 /* Get interrupt information for a given ino. */ in pcitool_intr_admn()
/titanic_51/usr/src/uts/common/sys/crypto/
H A Ddca.h229 * interrupt comes.
577 #define DMACTL_MCR2IE 0x40000000U /* MCR2 interrupt enable */
578 #define DMACTL_MCR1IE 0x20000000U /* MCR1 interrupt enable */
582 #define DMACTL_EIE 0x02000000U /* error interrupt enable */
/titanic_51/usr/src/cmd/vi/port/
H A Dex.news158 22.*an interrupt during a write operation will no longer cause truncated
377 an interrupt, you are warned that the file is incomplete.
497 possible on USG systems to interrupt redrawing the screen and to
546 into the buffer if you changed your interrupt character to
959 possible on USG systems to interrupt redrawing the screen and to
989 into the buffer if you changed your interrupt character to
/titanic_51/usr/src/uts/sparc/v9/ml/
H A Dsparcv9_subr.s71 * a higher-level interrupt thread that just blocked.
140 * Berkley 4.3 introduced symbolically named interrupt levels
154 * routine can call wakeup. Devices that interrupt from higher
157 * level (via software interrupt) to do the required
257 * at any time by an interrupt routine, so we must block interrupts and
630 * Get current processor interrupt level

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