| /linux/arch/x86/kvm/svm/ |
| H A D | nested.c | 142 c->intercepts[i] = h->intercepts[i]; in recalc_intercepts()
168 c->intercepts[i] |= g->intercepts[i]; in recalc_intercepts()
414 to->intercepts[i] = from->intercepts[i]; in __nested_copy_vmcb_control_to_cache()
502 !test_bit(INTERCEPT_VINTR, (unsigned long *)svm->nested.ctl.intercepts)) in nested_sync_control_from_vmcb02()
870 * Merge guest and host intercepts - must be called with vcpu in in nested_vmcb02_prepare_control()
904 trace_kvm_nested_intercepts(vmcb12->control.intercepts[INTERCEPT_CR] & 0xffff, in enter_svm_guest_mode()
905 vmcb12->control.intercepts[INTERCEPT_CR] >> 16, in enter_svm_guest_mode()
906 vmcb12->control.intercepts[INTERCEPT_EXCEPTION], in enter_svm_guest_mode()
907 vmcb12->control.intercepts[INTERCEPT_WORD3], in enter_svm_guest_mode()
908 vmcb12->control.intercepts[INTERCEPT_WORD4], in enter_svm_guest_mode()
[all …]
|
| H A D | svm.h | 151 u32 intercepts[MAX_INTERCEPT]; member
440 __set_bit(bit, (unsigned long *)&control->intercepts); in vmcb_set_intercept()
446 __clear_bit(bit, (unsigned long *)&control->intercepts); in vmcb_clr_intercept()
452 return test_bit(bit, (unsigned long *)&control->intercepts); in vmcb_is_intercept()
458 return test_bit(bit, (unsigned long *)&control->intercepts); in vmcb12_is_intercept()
|
| H A D | svm.c | 644 vmcb->control.intercepts[INTERCEPT_DR] = 0; in clr_dr_intercepts()
802 * x2APIC intercepts are modified on-demand and cannot be filtered by in svm_recalc_msr_intercepts()
851 * In this case, even though LBR_CTL does not need an update, intercepts in svm_update_lbrv()
852 * do, so always recalculate the intercepts here. in svm_update_lbrv()
975 /* Evaluate instruction intercepts that depend on guest CPUID features. */
1006 * in VMCB and clear intercepts to avoid #VMEXIT. in svm_recalc_instruction_intercepts()
1459 * Recalculating intercepts may have cleared the VINTR intercept. If in svm_set_vintr()
1710 * SEV-ES guests must always keep the CR intercepts cleared. CR in svm_set_cr0()
2570 * SEV-ES intercepts DR7 only to disable guest debugging and the guest issues a VMGEXIT in dr_interception()
3258 pr_err("%-20s%04x\n", "cr_read:", control->intercepts[INTERCEPT_CR] & 0xffff); in dump_vmcb()
[all …]
|
| H A D | sev.c | 2822 * created after SEV/SEV-ES initialization, e.g. to init intercepts. in sev_vm_copy_enc_context_from()
4521 /* Clear intercepts on MSRs that are context switched by hardware. */ in sev_es_recalc_msr_intercepts()
4603 vmcb->control.intercepts[INTERCEPT_DR] = 0; in sev_es_init_vmcb()
|
| /linux/Documentation/virt/kvm/s390/ |
| H A D | s390-pv.rst | 99 There are two types of SIE secure instruction intercepts: the normal
100 and the notification type. Normal secure instruction intercepts will
106 The notification type intercepts inform KVM about guest environment
|
| /linux/Documentation/driver-api/mei/ |
| H A D | iamt.rst | 47 intercepts the message and routes it to the Intel MEI.
|
| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | fsl,mpic-msi.yaml | 22 intercepts transactions and reroutes them to the true physical address.
|
| /linux/Documentation/userspace-api/media/v4l/ |
| H A D | libv4l-introduction.rst | 171 This library intercepts calls to
|
| /linux/arch/s390/kvm/ |
| H A D | trace.h | 196 * Trace point for validity intercepts.
|
| H A D | intercept.c | 3 * in-kernel handling for sie intercepts
|
| /linux/Documentation/arch/x86/ |
| H A D | sgx.rst | 134 ERESUME. The vDSO function intercepts exceptions that would otherwise generate
|
| /linux/Documentation/virt/hyperv/ |
| H A D | vpci.rst | 100 MMIO range, the Hyper-V host intercepts the accesses and maps
|
| /linux/arch/x86/mm/ |
| H A D | mem_encrypt_amd.c | 497 * AMD-SEV-ES intercepts the RDMSR to read the X2APIC ID in the in sme_early_init()
|
| /linux/arch/x86/include/asm/ |
| H A D | svm.h | 125 u32 intercepts[MAX_INTERCEPT]; member
|
| /linux/Documentation/networking/ |
| H A D | bridge.rst | 264 The br_netfilter module intercepts packets entering the bridge, performs
|
| H A D | tls-offload.rst | 42 intercepts them, inserts record framing, performs encryption (in ``TLS_SW``
|
| /linux/arch/x86/kernel/cpu/ |
| H A D | mshyperv.c | 679 * default, they are implemented as intercepts by the Windows Hyper-V stack.
|
| /linux/tools/testing/selftests/kvm/ |
| H A D | set_memory_region_test.c | 233 * repeatedly intercepts the state-2 page fault that occurs when trying in guest_code_delete_memory_region()
|
| /linux/arch/arm64/kvm/hyp/nvhe/ |
| H A D | ffa.c | 11 * This driver hooks into the SMC trapping logic for the host and intercepts
|
| /linux/include/hyperv/ |
| H A D | hvgdk_mini.h | 724 /* SynIC intercepts */
|
| /linux/drivers/platform/chrome/ |
| H A D | cros_ec_sensorhub_ring.c | 322 * Calculate y-intercepts as if m_median is the slope and in cros_ec_sensor_ring_ts_filter_update()
|
| /linux/arch/x86/kvm/ |
| H A D | pmu.c | 635 * On AMD, _all_ exceptions on RDPMC have priority over SVM intercepts, in kvm_pmu_check_rdpmc_early()
|
| /linux/arch/x86/coco/tdx/ |
| H A D | tdx.c | 1185 * TDX intercepts the RDMSR to read the X2APIC ID in the parallel in tdx_early_init()
|
| /linux/arch/x86/kvm/vmx/ |
| H A D | vmx.c | 2716 * intercepts writes to PAT and EFER, i.e. never enables those controls. in setup_vmcs_config()
4298 * x2APIC and LBR MSR intercepts are modified on-demand and cannot be in vmx_recalc_msr_intercepts()
5328 * be reflected to L1 (when it intercepts #NM) before reaching this in handle_exception_nmi()
6175 * SGX, so KVM intercepts all ENCLS leafs and injects a #UD to prevent in handle_encls()
8193 /* TODO: check more intercepts... */ in vmx_check_intercept()
|
| /linux/Documentation/virt/kvm/ |
| H A D | api.rst | 2297 table upfront. This is useful to handle validity intercepts for user
4270 on denied accesses, i.e. userspace effectively intercepts the MSR access. If
7484 SUBCHANNEL intercepts.
8013 emulated VM-exit when L1 intercepts a #PF exception that occurs in
8015 the emulated VM-exit when L1 intercepts a #DB exception that occurs in
8159 (which triggers an #AC exception that KVM intercepts). This capability is
|