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/freebsd/sys/contrib/device-tree/src/arm64/st/
H A Dstm32mp251.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
6 #include <dt-bindings/clock/st,stm32mp25-rcc.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/reset/st,stm32mp25-rcc.h>
9 #include <dt-bindings/regulator/st,stm32mp25-regulator.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
[all …]
/freebsd/sys/contrib/device-tree/src/mips/ingenic/
H A Djz4780.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
4 #include <dt-bindings/dma/jz4780-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
21 clock-names = "cpu";
[all …]
H A Dx1000.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,tcu.h>
3 #include <dt-bindings/clock/ingenic,x1000-cgu.h>
4 #include <dt-bindings/dma/x1000-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
21 clock-names = "cpu";
[all …]
H A Dx1830.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,tcu.h>
3 #include <dt-bindings/clock/ingenic,x1830-cgu.h>
4 #include <dt-bindings/dma/x1830-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu2.0-mxu2.0";
21 clock-names = "cpu";
[all …]
H A Djz4725b.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4725b-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cell
31 intc: interrupt-controller@10001000 { global() label
[all...]
H A Djz4770.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4770-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cell
31 intc: interrupt-controller@10001000 { global() label
[all...]
H A Djz4740.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4740-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-mxu1.0";
20 clock-names = "cpu";
24 cpuintc: interrupt-controller {
[all …]
/freebsd/sys/contrib/device-tree/src/arm/arm/
H A Darm-realview-pbx-a9.dts23 /dts-v1/;
24 #include "arm-realview-pbx.dtsi"
28 * This is the RealView Platform Baseboard Explore for Cortex-A9
31 model = "ARM RealView Platform Baseboard Explore for Cortex-A9";
35 #address-cells = <1>;
36 #size-cells = <0>;
37 enable-method = "arm,realview-smp";
39 cpu-map {
51 compatible = "arm,cortex-a9";
53 next-level-cache = <&L2>;
[all …]
H A Darm-realview-eb-mp.dtsi23 #include <dt-bindings/interrupt-controller/irq.h>
24 #include <dt-bindings/gpio/gpio.h>
25 #include "arm-realview-eb.dtsi"
30 * and Cortex-A9 MPCore.
34 #address-cells = <1>;
35 #size-cells = <1>;
36 compatible = "arm,realview-eb-soc", "simple-bus";
41 intc: interrupt-controller@1f000100 { label
42 compatible = "arm,eb11mp-gic";
43 #interrupt-cells = <3>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Dmmp3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/marvell,mmp2.h>
7 #include <dt-bindings/power/marvell,mmp2.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
17 enable-method = "marvell,mmp3-smp";
22 next-level-cache = <&l2>;
[all …]
H A Dmmp2.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/marvell,mmp2.h>
8 #include <dt-bindings/power/marvell,mmp2.h>
9 #include <dt-bindings/clock/marvell,mmp2-audio.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "simple-bus";
28 interrupt-parent = <&intc>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/xilinx/
H A Dzynq-7000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
7 #address-cells = <1>;
8 #size-cells = <1>;
9 compatible = "xlnx,zynq-7000";
12 #address-cells = <1>;
13 #size-cells = <0>;
16 compatible = "arm,cortex-a9";
20 clock-latency = <1000>;
21 cpu0-supply = <&regulator_vccpint>;
[all …]
/freebsd/sys/contrib/device-tree/src/arc/
H A Daxc001.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "simple-bus";
20 #address-cells = <1>;
21 #size-cells = <1>;
26 #clock-cells = <0>;
27 compatible = "fixed-clock";
28 clock-frequency = <750000000>;
[all …]
H A Daxc003_idu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 * Device tree for AXC003 CPU card: HS38x2 (Dual Core) with IDU intc
14 #address-cells = <2>;
15 #size-cells = <2>;
18 compatible = "simple-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
24 input_clk: input-clk {
25 #clock-cells = <0>;
26 compatible = "fixed-clock";
[all …]
H A Daxc003.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
14 #address-cells = <2>;
15 #size-cells = <2>;
18 compatible = "simple-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
24 input_clk: input-clk {
25 #clock-cells = <0>;
26 compatible = "fixed-clock";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstm32mp131.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp13-clks.h>
8 #include <dt-bindings/reset/stm32mp13-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
[all …]
H A Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dti,omap2-intc.txt8 - compatible : should be:
9 "ti,omap2-intc"
10 - interrupt-controller : Identifies the node as an interrupt controller
11 - #interrupt-cells : Specifies the number of cells needed to encode an
14 The cell contains the interrupt number in the range [0-128].
15 - ti,intc-size: Number of interrupts handled by the interrupt controller.
16 - reg: physical base address and size of the intc registers map.
20 intc: interrupt-controller@1 {
21 compatible = "ti,omap2-intc";
22 interrupt-controller;
[all …]
H A Dti,cp-intc.txt4 OMAP-L1x SoCs and can support several configurable number
9 - compatible : should be:
10 "ti,cp-intc"
11 - interrupt-controller : Identifies the node as an interrupt controller
12 - #interrupt-cells : Specifies the number of cells needed to encode an
15 The cell contains the interrupt number in the range [0-128].
16 - ti,intc-size: Number of interrupts handled by the interrupt controller.
17 - reg: physical base address and size of the intc registers map.
21 intc: interrupt-controller@1 {
22 compatible = "ti,cp-intc";
[all …]
H A Dcsky,apb-intc.txt2 C-SKY APB Interrupt Controller
5 C-SKY APB Interrupt Controller is a simple soc interrupt controller
8 - csky,apb-intc is used in a lot of csky fpgas and socs, it support 64 irq nums.
9 - csky,dual-apb-intc consists of 2 apb-intc and 128 irq nums supported.
10 - csky,gx6605s-intc is gx6605s soc internal irq interrupt controller, 64 irq nums.
13 intc node bindings definition
20 - compatible
23 Definition: must be "csky,apb-intc"
24 "csky,dual-apb-intc"
25 "csky,gx6605s-intc"
[all …]
H A Damlogic,meson-gpio-intc.txt12 - compatible : must have "amlogic,meson8-gpio-intc" and either
13 "amlogic,meson8-gpio-intc" for meson8 SoCs (S802) or
14 "amlogic,meson8b-gpio-intc" for meson8b SoCs (S805) or
15 "amlogic,meson-gxbb-gpio-intc" for GXBB SoCs (S905) or
16 "amlogic,meson-gxl-gpio-intc" for GXL SoCs (S905X, S912)
17 "amlogic,meson-axg-gpio-intc" for AXG SoCs (A113D, A113X)
18 "amlogic,meson-g12a-gpio-intc" for G12A SoCs (S905D2, S905X2, S905Y2)
19 "amlogic,meson-sm1-gpio-intc" for SM1 SoCs (S905D3, S905X3, S905Y3)
20 "amlogic,meson-a1-gpio-intc" for A1 SoCs (A113L)
21 "amlogic,meson-s4-gpio-intc" for S4 SoCs (S802X2, S905Y4, S805X2G, S905W2)
[all …]
/freebsd/sys/contrib/device-tree/src/mips/ralink/
H A Dmt7628a.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "ralink,mt7628a-soc";
9 #address-cells = <1>;
10 #size-cells = <0>;
19 resetc: reset-controller {
20 compatible = "ralink,rt2880-reset";
21 #reset-cells = <1>;
24 cpuintc: interrupt-controller {
[all …]
H A Drt3050.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
5 compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc";
14 #address-cells = <0>;
15 #interrupt-cells = <1>;
16 interrupt-controller;
17 compatible = "mti,cpu-interrupt-controller";
25 #address-cells = <1>;
26 #size-cells = <1>;
[all …]
/freebsd/sys/dts/arm/
H A Dversatilepb.dts3 /dts-v1/;
7 #address-cells = <1>;
8 #size-cells = <1>;
9 compatible = "arm,versatile-pb";
12 compatible = "simple-bus";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 intc: interrupt-controller { label
18 compatible = "arm,versatile-vic";
21 interrupt-controller;
[all …]
/freebsd/sys/contrib/device-tree/src/mips/realtek/
H A Drtl930x.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
6 compatible = "realtek,rtl9302-soc";
9 #address-cells = <1>;
10 #size-cells = <0>;
17 clock-names = "cpu";
21 baseclk: clock-800mhz {
22 compatible = "fixed-clock";
23 #clock-cells = <0>;
24 clock-frequency = <800000000>;
27 lx_clk: clock-175mhz {
[all …]

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