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/linux/drivers/gpio/
H A Dgpio-aggregator.c1 // SPDX-License-Identifier: GPL-2.0-only
5 // Copyright (C) 2019-2020 Glider bv
7 #define DRV_NAME "gpio-aggregator"
35 #include "dev-sync-probe.h"
49 int id;
65 unsigned int idx;
72 int offset;
84 static int gpio_aggregator_alloc(struct gpio_aggregator **aggr, size_t arg_size) in gpio_aggregator_alloc()
86 int ret; in gpio_aggregator_alloc()
91 return -ENOMEM; in gpio_aggregator_alloc()
[all …]
/linux/arch/sparc/include/asm/
H A Dmdesc.h1 /* SPDX-License-Identifier: GPL-2.0 */
40 u64 node, const char *name, int *lenp);
46 * mdesc_for_each_arc(arc, handle, node, MDESC_ARC_TYPE_{FWD,BACK}) {
52 #define MDESC_ARC_TYPE_FWD "fwd"
90 int mdesc_get_node_info(struct mdesc_handle *hp, u64 node,
93 void mdesc_fill_in_cpu_data(cpumask_t *mask);
94 void mdesc_populate_present_mask(cpumask_t *mask);
95 void mdesc_get_page_sizes(cpumask_t *mask, unsigned long *pgsz_mask);
/linux/fs/jfs/
H A Djfs_imap.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) International Business Machines Corp., 2000-2004
51 #define IAGFREE_LOCK_INIT(imap) mutex_init(&imap->im_freelock)
52 #define IAGFREE_LOCK(imap) mutex_lock(&imap->im_freelock)
53 #define IAGFREE_UNLOCK(imap) mutex_unlock(&imap->im_freelock)
56 #define AG_LOCK_INIT(imap,index) mutex_init(&(imap->im_aglock[index]))
57 #define AG_LOCK(imap,agno) mutex_lock(&imap->im_aglock[agno])
58 #define AG_UNLOCK(imap,agno) mutex_unlock(&imap->im_aglock[agno])
63 static int diAllocAG(struct inomap *, int, bool, struct inode *);
64 static int diAllocAny(struct inomap *, int, bool, struct inode *);
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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dbrcm,bcm7038-l1-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm7038-l1-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom BCM7038-style Level 1 interrupt controller
11 directly to one of the HW INT lines on each CPU. Every BCM7xxx set-top chip
16 - 64, 96, 128, or 160 incoming level IRQ lines
18 - Most onchip peripherals are wired directly to an L1 input
20 - A separate instance of the register set for each CPU, allowing individual
23 - Atomic mask/unmask operations
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/linux/drivers/irqchip/
H A Dirq-bcm7038-l1.c1 // SPDX-License-Identifier: GPL-2.0-only
39 unsigned int n_words;
79 static inline unsigned int reg_status(struct bcm7038_l1_chip *intc, in reg_status()
80 unsigned int word) in reg_status()
82 return (0 * intc->n_words + word) * sizeof(u32); in reg_status()
85 static inline unsigned int reg_mask_set(struct bcm7038_l1_chip *intc, in reg_mask_set()
86 unsigned int word) in reg_mask_set()
88 return (2 * intc->n_words + word) * sizeof(u32); in reg_mask_set()
91 static inline unsigned int reg_mask_clr(struct bcm7038_l1_chip *intc, in reg_mask_clr()
92 unsigned int word) in reg_mask_clr()
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/linux/arch/mips/boot/dts/brcm/
H A Dbcm7358.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
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H A Dbcm7360.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
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H A Dbcm7362.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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H A Dbcm7346.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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H A Dbcm7425.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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H A Dbcm7435.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <175625000>;
42 cpu_intc: interrupt-controller {
43 #address-cells = <0>;
44 compatible = "mti,cpu-interrupt-controller";
46 interrupt-controller;
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H A Dbcm7125.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <202500000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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H A Dbcm7420.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <93750000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm7445.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #address-cells = <2>;
6 #size-cells = <2>;
9 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "brcm,brahma-b15";
22 enable-method = "brcm,brahma-b15";
27 compatible = "brcm,brahma-b15";
[all …]
/linux/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_vlan.c1 // SPDX-License-Identifier: GPL-2.0+
10 static int sparx5_vlant_set_mask(struct sparx5 *sparx5, u16 vid) in sparx5_vlant_set_mask()
12 u32 mask[3]; in sparx5_vlant_set_mask() local
14 /* Divide up mask in 32 bit words */ in sparx5_vlant_set_mask()
15 bitmap_to_arr32(mask, sparx5->vlan_mask[vid], SPX5_PORTS); in sparx5_vlant_set_mask()
17 /* Output mask to respective registers */ in sparx5_vlant_set_mask()
18 spx5_wr(mask[0], sparx5, ANA_L3_VLAN_MASK_CFG(vid)); in sparx5_vlant_set_mask()
20 spx5_wr(mask[1], sparx5, ANA_L3_VLAN_MASK_CFG1(vid)); in sparx5_vlant_set_mask()
21 spx5_wr(mask[2], sparx5, ANA_L3_VLAN_MASK_CFG2(vid)); in sparx5_vlant_set_mask()
44 void sparx5_vlan_port_setup(struct sparx5 *sparx5, int portno) in sparx5_vlan_port_setup()
[all …]
/linux/include/linux/ceph/
H A Dceph_fs.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * ceph_fs.h - Ceph constants and data types to share between kernel and
6 * Most types in this file are defined as little-endian, and are
20 * subprotocol versions. when specific messages types or high-level
23 * client-facing protocol.
41 /* file -> object mapping */
49 /* pg -> disk layout */
50 __le32 fl_object_stripe_unit; /* UNUSED. for per-object parity, if any */
52 /* object -> pg layout */
53 __le32 fl_unused; /* unused; used to be preferred primary for pg (-1 for none) */
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/linux/include/linux/
H A Dparport_pc.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 /* --- register definitions ------------------------------- */
9 #define ECONTROL(p) ((p)->base_hi + 0x2)
10 #define CONFIGB(p) ((p)->base_hi + 0x1)
11 #define CONFIGA(p) ((p)->base_hi + 0x0)
12 #define FIFO(p) ((p)->base_hi + 0x0)
13 #define EPPDATA(p) ((p)->base + 0x4)
14 #define EPPADDR(p) ((p)->base + 0x3)
15 #define CONTROL(p) ((p)->base + 0x2)
16 #define STATUS(p) ((p)->base + 0x1)
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/linux/include/net/
H A Dip_vs.h1 /* SPDX-License-Identifier: GPL-2.0 */
40 return net->ipvs; in net_ipvs()
44 extern int ip_vs_conn_tab_size;
49 int hdr_flags; /* ipvs flags */
60 static inline void *frag_safe_skb_hp(const struct sk_buff *skb, int offset, in frag_safe_skb_hp()
61 int len, void *buffer) in frag_safe_skb_hp()
70 static inline int
71 ip_vs_fill_iph_skb_off(int af, const struct sk_buff *skb, int offset, in ip_vs_fill_iph_skb_off()
72 int hdr_flags, struct ip_vs_iphdr *iphdr) in ip_vs_fill_iph_skb_off()
74 iphdr->hdr_flags = hdr_flags; in ip_vs_fill_iph_skb_off()
[all …]
/linux/arch/x86/events/intel/
H A Dds.c1 // SPDX-License-Identifier: GPL-2.0
40 unsigned int ld_dse:4;
41 unsigned int ld_stlb_miss:1;
42 unsigned int ld_locked:1;
43 unsigned int ld_data_blk:1;
44 unsigned int ld_addr_blk:1;
45 unsigned int ld_reserved:24;
48 unsigned int st_l1d_hit:1;
49 unsigned int st_reserved1:3;
50 unsigned int st_stlb_miss:1;
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/linux/include/uapi/linux/
H A Dip_vs.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
23 #define IP_VS_SVC_F_ONEPACKET 0x0004 /* one-packet scheduling */
82 #define IP_VS_CONN_F_FWD_MASK 0x0007 /* mask for the fwd methods */
94 #define IP_VS_CONN_F_SEQ_MASK 0x0600 /* in/out sequence mask */
153 unsigned int flags; /* virtual service flags */
154 unsigned int timeout; /* persistent timeout in sec */
165 unsigned int conn_flags; /* connection flags */
166 int weight; /* destination weight */
195 unsigned int version;
198 unsigned int size;
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/linux/drivers/net/ethernet/intel/ice/
H A Dice_switch.h1 /* SPDX-License-Identifier: GPL-2.0 */
143 u16 mask; member
156 union ice_prot_hdr m_u; /* Mask of header values to match */
157 /* Used to iterate over header mask */
255 * is created, usually recipes can have 'fwd' and 'join'
278 int status;
324 int
327 int
330 int
337 int ice_get_initial_sw_cfg(struct ice_hw *hw);
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/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_main.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
32 static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation.";
37 static int i40e_add_vsi(struct i40e_vsi *vsi);
38 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
39 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired);
40 static int i40e_setup_misc_vector(struct i40e_pf *pf);
42 static int i40e_setup_pf_filter_contro
4087 i40e_irq_affinity_notify(struct irq_affinity_notify * notify,const cpumask_t * mask) i40e_irq_affinity_notify() argument
7466 u64 mask; i40e_force_link_state() local
7817 i40e_fwd_ring_up(struct i40e_vsi * vsi,struct net_device * vdev,struct i40e_fwd_adapter * fwd) i40e_fwd_ring_up() argument
7996 struct i40e_fwd_adapter *fwd; i40e_fwd_add() local
8137 struct i40e_fwd_adapter *fwd = vdev; i40e_fwd_del() local
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/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Dfs_core.h14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
76 int reformat_type; /* from mlx5_ifc */
146 int rdma_transport_rx_vports;
147 int rdma_transport_tx_vports;
177 int num_rules;
191 unsigned int max_fte;
192 unsigned int level;
197 unsigned int required_groups;
198 unsigned int group_size;
[all …]
/linux/drivers/parport/
H A Dieee1284.c2 * IEEE-1284 implementation for parport.
5 * Carsten Gross <carsten@sol.wohnheim.uni-ulm.de>
10 * read/write requests to low-level drivers.
38 up (&port->physport->ieee1284.irq); in parport_ieee1284_wakeup()
49 * parport_wait_event - wait for an event on a parallel port
64 int parport_wait_event (struct parport *port, signed long timeout) in parport_wait_event()
66 int ret; in parport_wait_event()
68 if (!port->physport->cad->timeout) in parport_wait_event()
73 timer_setup(&port->timer, timeout_waiting_on_port, 0); in parport_wait_event()
74 mod_timer(&port->timer, jiffies + timeout); in parport_wait_event()
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/linux/tools/perf/util/
H A Dintel-pt.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2013-2015, Intel Corporation.
28 #include "thread-stack.h"
35 #include "intel-pt.h"
38 #include "util/synthetic-events.h"
39 #include "time-utils.h"
43 #include "intel-pt-decoder/intel-pt-log.h"
44 #include "intel-pt-decoder/intel-pt-decoder.h"
45 #include "intel-pt-decoder/intel-pt-insn-decoder.h"
46 #include "intel-pt-decoder/intel-pt-pkt-decoder.h"
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