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Searched +full:imx5 +full:- +full:clock (Results 1 – 8 of 8) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dimx5-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx5-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX5 Clock Controller
10 - Fabio Estevam <festevam@gmail.com>
13 The clock consumer should specify the desired clock by having the clock
14 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx5-clock.h
15 for the full list of i.MX5 clock IDs.
20 - fsl,imx53-ccm
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/linux/Documentation/devicetree/bindings/rtc/
H A Drtc-mxc_v2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/rtc-mxc_v2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: i.MX53 Secure Real Time Clock (SRTC)
10 - $ref: rtc.yaml#
13 - Patrick Bruenn <p.bruenn@beckhoff.com>
18 - fsl,imx53-rtc
30 - compatible
31 - reg
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/linux/Documentation/devicetree/bindings/w1/
H A Dfsl-imx-owire.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/w1/fsl-imx-owire.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Martin Fuzzey <mfuzzey@parkeon.com>
15 - const: fsl,imx21-owire
16 - items:
17 - enum:
18 - fsl,imx27-owire
19 - fsl,imx50-owire
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/linux/Documentation/devicetree/bindings/pwm/
H A Dimx-pwm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/imx-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Philipp Zabel <p.zabel@pengutronix.de>
13 - $ref: pwm.yaml#
16 "#pwm-cells":
19 PWM_POLARITY_INVERTED. fsl,imx1-pwm does not support this flags.
24 - enum:
25 - fsl,imx1-pwm
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/linux/Documentation/devicetree/bindings/nvmem/
H A Dimx-iim.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/imx-iim.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
12 - Fabio Estevam <festevam@gmail.com>
19 - $ref: nvmem.yaml#
24 - fsl,imx25-iim
25 - fsl,imx27-iim
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/linux/Documentation/devicetree/bindings/spi/
H A Dfsl-imx-cspi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/fsl-imx-cspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: /schemas/spi/spi-controller.yaml#
18 - const: fsl,imx1-cspi
19 - const: fsl,imx21-cspi
20 - const: fsl,imx27-cspi
21 - const: fsl,imx31-cspi
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/linux/Documentation/devicetree/bindings/serial/
H A Dfsl-imx-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabio Estevam <festevam@gmail.com>
15 - const: fsl,imx1-uart
16 - const: fsl,imx21-uart
17 - items:
18 - enum:
19 - fsl,imx25-uart
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/linux/drivers/clk/imx/
H A Dclk-imx5.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/clk-provider.h>
17 #include <dt-bindings/clock/imx5-clock.h>
65 /* Low-power Audio Playback Mode clock */
304 * This clock is called periph_clk in the i.MX50 Reference Manual, but in mx50_clocks_init()
350 /* set SDHC root clock to 200MHZ*/ in mx50_clocks_init()
363 CLK_OF_DECLARE(imx50_ccm, "fsl,imx50-ccm", mx50_clocks_init);
444 /* set SDHC root clock to 166.25MHZ*/ in mx51_clocks_init()
457 * enabled without the IPU clock being enabled aswell. in mx51_clocks_init()
469 CLK_OF_DECLARE(imx51_ccm, "fsl,imx51-ccm", mx51_clocks_init);
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