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/linux/lib/
H A Dsys_info.c17 [ilog2(SYS_INFO_TASKS)] = "tasks",
18 [ilog2(SYS_INFO_MEM)] = "mem",
19 [ilog2(SYS_INFO_TIMERS)] = "timers",
20 [ilog2(SYS_INFO_LOCKS)] = "locks",
21 [ilog2(SYS_INFO_FTRACE)] = "ftrace",
22 [ilog2(SYS_INFO_PANIC_CONSOLE_REPLAY)] = "",
23 [ilog2(SYS_INFO_ALL_BT)] = "all_bt",
24 [ilog2(SYS_INFO_BLOCKED_TASKS)] = "blocked_tasks",
H A Dgeneric-radix-tree.c40 if (n && ilog2(offset) < genradix_depth_shift(level)) in __genradix_ptr_alloc()
105 if (ilog2(iter->offset) >= genradix_depth_shift(level)) in __genradix_iter_peek()
159 if (ilog2(iter->offset) >= genradix_depth_shift(level)) { in __genradix_iter_peek_prev()
/linux/drivers/gpu/drm/xe/
H A Dxe_hw_engine.c61 .irq_offset = ilog2(INTR_RCS0),
69 .irq_offset = ilog2(INTR_BCS(0)),
77 .irq_offset = ilog2(INTR_BCS(1)),
85 .irq_offset = ilog2(INTR_BCS(2)),
93 .irq_offset = ilog2(INTR_BCS(3)),
101 .irq_offset = ilog2(INTR_BCS(4)),
109 .irq_offset = ilog2(INTR_BCS(5)),
117 .irq_offset = ilog2(INTR_BCS(6)),
124 .irq_offset = ilog2(INTR_BCS(7)),
133 .irq_offset = ilog2(INTR_BCS8),
[all …]
H A Dxe_lmtt_ml.c67 #define LMTT_ML_PTE_MAX_NUM BIT(35 - ilog2(SZ_2M))
110 return ilog2(SZ_32G); in lmtt_ml_pte_shift()
112 return ilog2(SZ_2M); in lmtt_ml_pte_shift()
/linux/drivers/net/ethernet/mellanox/mlx4/
H A Den_resources.c52 context->rq_size_stride = ilog2(size) << 3 | (ilog2(stride) - 4); in mlx4_en_fill_qp_context()
54 context->sq_size_stride = ilog2(size) << 3 | (ilog2(stride) - 4); in mlx4_en_fill_qp_context()
59 context->sq_size_stride = ilog2(TXBB_SIZE) - 4; in mlx4_en_fill_qp_context()
/linux/arch/powerpc/include/asm/
H A Dcpufeature.h21 * #define PPC_MODULE_FEATURE_32 (ilog2(PPC_FEATURE_32))
24 #define PPC_MODULE_FEATURE_VEC_CRYPTO (32 + ilog2(PPC_FEATURE2_VEC_CRYPTO))
25 #define PPC_MODULE_FEATURE_P10 (32 + ilog2(PPC_FEATURE2_ARCH_3_1))
/linux/tools/perf/trace/beauty/
H A Dmmap_flags.sh26 xargs printf "\t[ilog2(%s) + 1] = \"%s\",\n#ifndef MAP_%s\n#define MAP_%s %s\n#endif\n")
31 xargs printf "\t[ilog2(%s) + 1] = \"%s\",\n#ifndef MAP_%s\n#define MAP_%s %s\n#endif\n")
37 xargs printf "\t[ilog2(%s) + 1] = \"%s\",\n#ifndef MAP_%s\n#define MAP_%s %s\n#endif\n")
42 xargs printf "\t[ilog2(%s) + 1] = \"%s\",\n#ifndef MAP_%s\n#define MAP_%s %s\n#endif\n")
H A Dmmap_prot.sh25 …xargs printf "\t[ilog2(%s) + 1] = \"%s\",\n#ifndef ${prefix}_%s\n#define ${prefix}_%s %s\n#endif\n…
30 …xargs printf "\t[ilog2(%s) + 1] = \"%s\",\n#ifndef ${prefix}_%s\n#define ${prefix}_%s %s\n#endif\n…
/linux/drivers/pci/
H A Drebar.c32 int rebar_minsize = ilog2(PCI_REBAR_MIN_SIZE); in pci_rebar_bytes_to_size()
36 return max(ilog2(bytes), rebar_minsize) - rebar_minsize; in pci_rebar_bytes_to_size()
48 return 1ULL << (size + ilog2(PCI_REBAR_MIN_SIZE)); in pci_rebar_size_to_bytes()
142 if (size < 0 || size > ilog2(SZ_128T) - ilog2(PCI_REBAR_MIN_SIZE)) in pci_rebar_size_supported()
/linux/net/ethtool/
H A Dtunnels.c16 static_assert(ETHTOOL_UDP_TUNNEL_TYPE_VXLAN == ilog2(UDP_TUNNEL_TYPE_VXLAN));
17 static_assert(ETHTOOL_UDP_TUNNEL_TYPE_GENEVE == ilog2(UDP_TUNNEL_TYPE_GENEVE));
19 ilog2(UDP_TUNNEL_TYPE_VXLAN_GPE));
145 ilog2(UDP_TUNNEL_TYPE_VXLAN))) in ethnl_tunnel_info_fill_reply()
/linux/tools/include/linux/
H A Dlog2.h62 * ilog2 - log of base 2 of 32-bit or a 64-bit unsigned value
71 #define ilog2(n) \ macro
155 (1UL << (ilog2((n) - 1) + 1)) \
171 (1UL << ilog2(n))) : \
/linux/drivers/iommu/generic_pt/
H A Dpt_fmt_defaults.h26 (PT_TABLEMEM_LG2SZ - ilog2(PT_ITEM_WORD_SIZE)) * pts->level; in pt_table_item_lg2sz()
35 (PT_TABLEMEM_LG2SZ - ilog2(PT_ITEM_WORD_SIZE)); in pt_pgsz_lg2_to_level()
49 return ilog2(1); in pt_entry_num_contig_lg2()
57 return ilog2(1); in pt_contig_count_lg2()
/linux/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/
H A Dfs_hws_pools.c23 log_bulk_size = ilog2(MLX5_FS_HWS_DEFAULT_BULK_LEN); in mlx5_fs_dl3tnltol2_bulk_action_create()
39 log_bulk_size = ilog2(MLX5_FS_HWS_DEFAULT_BULK_LEN); in mlx5_fs_el2tol3tnl_bulk_action_create()
55 log_bulk_size = ilog2(MLX5_FS_HWS_DEFAULT_BULK_LEN); in mlx5_fs_el2tol2tnl_bulk_action_create()
67 log_bulk_size = ilog2(MLX5_FS_HWS_DEFAULT_BULK_LEN); in mlx5_fs_insert_hdr_bulk_action_create()
249 log_bulk_size = ilog2(MLX5_FS_HWS_DEFAULT_BULK_LEN); in mlx5_fs_mh_bulk_action_create()
/linux/drivers/gpu/
H A Dbuddy.c398 mm->max_order = ilog2(size) - ilog2(chunk_size); in gpu_buddy_init()
443 order = ilog2(size) - ilog2(chunk_size); in gpu_buddy_init()
499 order = ilog2(size) - ilog2(mm->chunk_size); in gpu_buddy_fini()
578 order = ilog2(size) - ilog2(mm->chunk_size); in gpu_buddy_reset_clear()
1011 alignment = ilog2(min_block_size); in gpu_buddy_offset_aligned_allocation()
1012 pages = size >> ilog2(mm->chunk_size); in gpu_buddy_offset_aligned_allocation()
1192 order = ilog2(modify_size) - ilog2(mm->chunk_size); in __alloc_contig_try_harder()
1448 pages = size >> ilog2(mm->chunk_size); in gpu_buddy_alloc_blocks()
1450 min_order = ilog2(min_block_size) - ilog2(mm->chunk_size); in gpu_buddy_alloc_blocks()
/linux/arch/arm/include/asm/
H A Dcpufeature.h26 #define __hwcap_feature(x) ilog2(HWCAP_ ## x)
27 #define __hwcap2_feature(x) (32 + ilog2(HWCAP2_ ## x))
/linux/include/linux/
H A Dassoc_array_priv.h19 #define ASSOC_ARRAY_LEVEL_STEP (ilog2(ASSOC_ARRAY_FAN_OUT))
22 #define ASSOC_ARRAY_KEY_CHUNK_SHIFT (ilog2(BITS_PER_LONG))
47 * segments, where each segment is ilog2(ASSOC_ARRAY_FAN_OUT) bits in size.
/linux/drivers/pci/endpoint/
H A Dpci-epc-mem.c26 unsigned int page_shift = ilog2(mem->window.page_size); in pci_epc_mem_get_order()
73 page_shift = ilog2(page_size); in pci_epc_multi_mem_init()
201 page_shift = ilog2(mem->window.page_size); in pci_epc_mem_alloc_addr()
263 page_shift = ilog2(page_size); in pci_epc_mem_free_addr()
/linux/arch/mips/mm/
H A Dtlbex.c352 UASM_i_SLL(p, GPR_K0, GPR_K0, ilog2(sizeof(struct tlb_reg_save))); in build_get_work_registers()
593 UASM_i_ROTR(p, reg, reg, ilog2(_PAGE_GLOBAL)); in build_convert_pte_to_entrylo()
595 UASM_i_SRL(p, reg, reg, ilog2(_PAGE_NO_EXEC)); in build_convert_pte_to_entrylo()
597 ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC)); in build_convert_pte_to_entrylo()
601 uasm_i_dsrl_safe(p, reg, reg, ilog2(_PAGE_GLOBAL)); in build_convert_pte_to_entrylo()
603 UASM_i_SRL(p, reg, reg, ilog2(_PAGE_GLOBAL)); in build_convert_pte_to_entrylo()
683 uasm_il_bbit1(p, r, tmp, ilog2(_PAGE_HUGE), lid); in build_is_huge_pte()
1004 UASM_i_ROTR(p, tmp, tmp, ilog2(_PAGE_GLOBAL)); in build_update_entries()
1014 UASM_i_ROTR(p, tmp, tmp, ilog2(_PAGE_GLOBAL)); in build_update_entries()
1178 uasm_il_bbit1(p, r, scratch, ilog2(_PAGE_HUGE), label_tlb_huge_update); in build_fast_tlb_refill_handler()
[all …]
/linux/drivers/net/ethernet/huawei/hinic3/
H A Dhinic3_queue_common.c19 qpages->elem_size_shift = ilog2(elem_size); in hinic3_queue_pages_init()
20 qpages->elem_per_pg_shift = ilog2(elem_per_page); in hinic3_queue_pages_init()
/linux/drivers/media/pci/tw5864/
H A Dtw5864-h264.c114 bs_write_ue(s, ilog2(MAX_GOP_SIZE) - 4); /* log2_max_frame_num_minus4 */ in tw5864_h264_gen_sps_rbsp()
117 bs_write_ue(s, ilog2(MAX_GOP_SIZE) - 4); in tw5864_h264_gen_sps_rbsp()
168 bs_write(s, ilog2(MAX_GOP_SIZE), frame_gop_seqno); /* frame_num */ in tw5864_h264_gen_slice_head()
173 bs_write(s, ilog2(MAX_GOP_SIZE), frame_gop_seqno); in tw5864_h264_gen_slice_head()
/linux/tools/testing/selftests/mm/
H A Dthuge-gen.c34 int ilog2(unsigned long v)
144 int arg = ilog2(ps) << MAP_HUGE_SHIFT; in test_shmget()
158 int arg = ilog2(ps) << SHM_HUGE_SHIFT; in find_pagesizes()
56 int ilog2(unsigned long v) ilog2() function
/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu_cn10k.c385 cfg |= FIELD_PREP(LBK_LINK_CFG_RANGE_MASK, ilog2(chans)); in __rvu_lbk_set_chans()
479 cfg |= FIELD_PREP(NIX_AF_LINKX_RANGE_MASK, ilog2(cgx_chans)); in __rvu_nix_set_channels()
489 cfg |= FIELD_PREP(NIX_AF_LINKX_RANGE_MASK, ilog2(lbk_chans)); in __rvu_nix_set_channels()
499 cfg |= FIELD_PREP(NIX_AF_LINKX_RANGE_MASK, ilog2(sdp_chans)); in __rvu_nix_set_channels()
509 cfg |= FIELD_PREP(NIX_AF_LINKX_RANGE_MASK, ilog2(cpt_chans)); in __rvu_nix_set_channels()
537 cfg |= FIELD_PREP(RPMX_CMRX_LINK_RANGE_MASK, ilog2(16)); in __rvu_rpm_set_channels()
/linux/arch/powerpc/platforms/powernv/
H A Dpci-ioda-tce.c87 const long shift = ilog2(tbl->it_level_size); in pnv_tce()
101 ilog2(tbl->it_level_size) + 3); in pnv_tce()
110 ilog2(tbl->it_level_size) + 3, 1); in pnv_tce()
297 const unsigned int window_shift = ilog2(window_size); in pnv_pci_ioda2_table_alloc_pages()
/linux/arch/mips/bcm63xx/
H A Dcs.c52 val |= (ilog2(size) - ilog2(8 * 1024)) << MPI_CSBASE_SIZE_SHIFT; in bcm63xx_set_cs_base()
/linux/drivers/iommu/
H A Dio-pgtable-dart.c44 (DART_GRANULE(d) >> ilog2(sizeof(dart_iopte)))
163 return (iova >> (level * data->bits_per_level + ilog2(sizeof(dart_iopte)))) & in dart_get_index()
170 return (iova >> (data->bits_per_level + ilog2(sizeof(dart_iopte)))) & in dart_get_last_index()
377 bits_per_level = pg_shift - ilog2(sizeof(dart_iopte)); in dart_alloc_pgtable()

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