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/linux/drivers/net/ethernet/atheros/alx/
H A Dhw.c39 #include "hw.h"
46 static int alx_wait_mdio_idle(struct alx_hw *hw) in alx_wait_mdio_idle() argument
52 val = alx_read_mem32(hw, ALX_MDIO); in alx_wait_mdio_idle()
61 static int alx_read_phy_core(struct alx_hw *hw, bool ext, u8 dev, in alx_read_phy_core() argument
70 clk_sel = hw->link_speed != SPEED_UNKNOWN ? in alx_read_phy_core()
77 alx_write_mem32(hw, ALX_MDIO_EXTN, val); in alx_read_phy_core()
88 alx_write_mem32(hw, ALX_MDIO, val); in alx_read_phy_core()
90 err = alx_wait_mdio_idle(hw); in alx_read_phy_core()
93 val = alx_read_mem32(hw, ALX_MDIO); in alx_read_phy_core()
98 static int alx_write_phy_core(struct alx_hw *hw, bool ext, u8 dev, in alx_write_phy_core() argument
[all …]
/linux/drivers/clk/meson/
H A Dmeson8b.c155 .hw.init = &(struct clk_init_data){
174 .hw.init = &(struct clk_init_data){
178 &meson8b_fixed_pll_dco.hw
191 .hw.init = &(struct clk_init_data){
274 .hw.init = &(struct clk_init_data){
279 &hdmi_pll_dco_in.hw
292 .hw.init = &(struct clk_init_data){
296 &meson8b_hdmi_pll_dco.hw
310 .hw.init = &(struct clk_init_data){
314 &meson8b_hdmi_pll_dco.hw
[all …]
/linux/drivers/clk/sprd/
H A Dsc9863a-clk.c57 [CLK_MPLL0_GATE] = &mpll0_gate.common.hw,
58 [CLK_DPLL0_GATE] = &dpll0_gate.common.hw,
59 [CLK_LPLL_GATE] = &lpll_gate.common.hw,
60 [CLK_GPLL_GATE] = &gpll_gate.common.hw,
61 [CLK_DPLL1_GATE] = &dpll1_gate.common.hw,
62 [CLK_MPLL1_GATE] = &mpll1_gate.common.hw,
63 [CLK_MPLL2_GATE] = &mpll2_gate.common.hw,
64 [CLK_ISPPLL_GATE] = &isppll_gate.common.hw,
93 static CLK_FIXED_FACTOR_HW(twpll_768m, "twpll-768m", &twpll.common.hw, 2, 1, 0);
94 static CLK_FIXED_FACTOR_HW(twpll_384m, "twpll-384m", &twpll.common.hw, 4, 1, 0);
[all …]
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_adminq.c9 static void i40e_resume_aq(struct i40e_hw *hw);
13 * @hw: pointer to the hardware structure
15 static int i40e_alloc_adminq_asq_ring(struct i40e_hw *hw) in i40e_alloc_adminq_asq_ring() argument
19 ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf, in i40e_alloc_adminq_asq_ring()
20 (hw->aq.num_asq_entries * in i40e_alloc_adminq_asq_ring()
26 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf, in i40e_alloc_adminq_asq_ring()
27 (hw->aq.num_asq_entries * in i40e_alloc_adminq_asq_ring()
30 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); in i40e_alloc_adminq_asq_ring()
39 * @hw: pointer to the hardware structure
41 static int i40e_alloc_adminq_arq_ring(struct i40e_hw *hw) in i40e_alloc_adminq_arq_ring() argument
[all …]
H A Di40e_prototype.h20 int i40e_init_adminq(struct i40e_hw *hw);
21 void i40e_shutdown_adminq(struct i40e_hw *hw);
22 int i40e_clean_arq_element(struct i40e_hw *hw,
26 i40e_asq_send_command(struct i40e_hw *hw, struct libie_aq_desc *desc,
30 i40e_asq_send_command_atomic(struct i40e_hw *hw, struct libie_aq_desc *desc,
35 i40e_asq_send_command_atomic_v2(struct i40e_hw *hw,
44 void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask,
47 bool i40e_check_asq_alive(struct i40e_hw *hw);
48 int i40e_aq_queue_shutdown(struct i40e_hw *hw, bool unloading);
50 int i40e_aq_get_rss_lut(struct i40e_hw *hw, u16 seid,
[all …]
H A Di40e_nvm.c11 * @hw: pointer to the HW structure
19 int i40e_init_nvm(struct i40e_hw *hw) in i40e_init_nvm() argument
21 struct i40e_nvm_info *nvm = &hw->nvm; in i40e_init_nvm()
29 gens = rd32(hw, I40E_GLNVM_GENS); in i40e_init_nvm()
35 fla = rd32(hw, I40E_GLNVM_FLA); in i40e_init_nvm()
43 i40e_debug(hw, I40E_DEBUG_NVM, "NVM init error: unsupported blank mode.\n"); in i40e_init_nvm()
51 * @hw: pointer to the HW structure
57 int i40e_acquire_nvm(struct i40e_hw *hw, in i40e_acquire_nvm() argument
64 if (hw->nvm.blank_nvm_mode) in i40e_acquire_nvm()
67 ret_code = i40e_aq_request_resource(hw, I40E_NVM_RESOURCE_ID, access, in i40e_acquire_nvm()
[all …]
/linux/drivers/clk/sophgo/
H A Dclk-cv1800.c71 { .hw = &clk_mipimpll.common.hw },
75 { .hw = &clk_mipimpll.common.hw },
79 { .hw = &clk_fpll.common.hw },
167 { .hw = &clk_cam0pll.common.hw },
187 { .hw = &clk_tpll.common.hw },
188 { .hw = &clk_a0pll.common.hw },
189 { .hw = &clk_mipimpll.common.hw },
190 { .hw = &clk_fpll.common.hw },
211 { .hw = &clk_axi6.div.common.hw },
215 { .hw = &clk_axi6.div.common.hw },
[all …]
/linux/drivers/net/ethernet/atheros/atl1c/
H A Datl1c_hw.c19 int atl1c_check_eeprom_exist(struct atl1c_hw *hw) in atl1c_check_eeprom_exist() argument
23 AT_READ_REG(hw, REG_TWSI_DEBUG, &data); in atl1c_check_eeprom_exist()
27 AT_READ_REG(hw, REG_MASTER_CTRL, &data); in atl1c_check_eeprom_exist()
33 void atl1c_hw_set_mac_addr(struct atl1c_hw *hw, u8 *mac_addr) in atl1c_hw_set_mac_addr() argument
45 AT_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 0, value); in atl1c_hw_set_mac_addr()
49 AT_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 1, value); in atl1c_hw_set_mac_addr()
53 static bool atl1c_read_current_addr(struct atl1c_hw *hw, u8 *eth_addr) in atl1c_read_current_addr() argument
57 AT_READ_REG(hw, REG_MAC_STA_ADDR, &addr[0]); in atl1c_read_current_addr()
58 AT_READ_REG(hw, REG_MAC_STA_ADDR + 4, &addr[1]); in atl1c_read_current_addr()
70 static int atl1c_get_permanent_address(struct atl1c_hw *hw) in atl1c_get_permanent_address() argument
[all …]
/linux/drivers/net/ethernet/intel/iavf/
H A Diavf_adminq.c12 * @hw: pointer to the hardware structure
14 static enum iavf_status iavf_alloc_adminq_asq_ring(struct iavf_hw *hw) in iavf_alloc_adminq_asq_ring() argument
18 ret_code = iavf_allocate_dma_mem(hw, &hw->aq.asq.desc_buf, in iavf_alloc_adminq_asq_ring()
20 (hw->aq.num_asq_entries * in iavf_alloc_adminq_asq_ring()
26 ret_code = iavf_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf, in iavf_alloc_adminq_asq_ring()
27 (hw->aq.num_asq_entries * in iavf_alloc_adminq_asq_ring()
30 iavf_free_dma_mem(hw, &hw->aq.asq.desc_buf); in iavf_alloc_adminq_asq_ring()
39 * @hw: pointer to the hardware structure
41 static enum iavf_status iavf_alloc_adminq_arq_ring(struct iavf_hw *hw) in iavf_alloc_adminq_arq_ring() argument
45 ret_code = iavf_allocate_dma_mem(hw, &hw->aq.arq.desc_buf, in iavf_alloc_adminq_arq_ring()
[all …]
/linux/drivers/vdpa/ifcvf/
H A Difcvf_base.c13 u16 ifcvf_set_vq_vector(struct ifcvf_hw *hw, u16 qid, int vector) in ifcvf_set_vq_vector() argument
15 struct virtio_pci_common_cfg __iomem *cfg = hw->common_cfg; in ifcvf_set_vq_vector()
23 u16 ifcvf_set_config_vector(struct ifcvf_hw *hw, int vector) in ifcvf_set_config_vector() argument
25 struct virtio_pci_common_cfg __iomem *cfg = hw->common_cfg; in ifcvf_set_config_vector()
32 static void __iomem *get_cap_addr(struct ifcvf_hw *hw, in get_cap_addr() argument
43 IFCVF_DBG(hw->pdev, in get_cap_addr()
48 if (offset + length > pci_resource_len(hw->pdev, bar)) { in get_cap_addr()
49 IFCVF_DBG(hw->pdev, in get_cap_addr()
55 return hw->base[bar] + offset; in get_cap_addr()
72 u16 ifcvf_get_vq_size(struct ifcvf_hw *hw, u16 qid) in ifcvf_get_vq_size() argument
[all …]
/linux/drivers/scsi/csiostor/
H A Dcsio_init.c68 struct csio_hw *hw = file->private_data - mem; in csio_mem_read() local
83 ret = hw->chip_ops->chip_mc_read(hw, 0, pos, in csio_mem_read()
86 ret = hw->chip_ops->chip_edc_read(hw, mem, pos, in csio_mem_read()
112 void csio_add_debugfs_mem(struct csio_hw *hw, const char *name, in csio_add_debugfs_mem() argument
115 debugfs_create_file_size(name, S_IRUSR, hw->debugfs_root, in csio_add_debugfs_mem()
116 (void *)hw + idx, &csio_mem_debugfs_fops, in csio_add_debugfs_mem()
120 static int csio_setup_debugfs(struct csio_hw *hw) in csio_setup_debugfs() argument
124 if (IS_ERR_OR_NULL(hw->debugfs_root)) in csio_setup_debugfs()
127 i = csio_rd_reg32(hw, MA_TARGET_MEM_ENABLE_A); in csio_setup_debugfs()
129 csio_add_debugfs_mem(hw, "edc0", MEM_EDC0, 5); in csio_setup_debugfs()
[all …]
H A Dcsio_isr.c47 struct csio_hw *hw = (struct csio_hw *) dev_id; in csio_nondata_isr() local
51 if (unlikely(!hw)) in csio_nondata_isr()
54 if (unlikely(pci_channel_offline(hw->pdev))) { in csio_nondata_isr()
55 CSIO_INC_STATS(hw, n_pcich_offline); in csio_nondata_isr()
59 spin_lock_irqsave(&hw->lock, flags); in csio_nondata_isr()
60 csio_hw_slow_intr_handler(hw); in csio_nondata_isr()
61 rv = csio_mb_isr_handler(hw); in csio_nondata_isr()
63 if (rv == 0 && !(hw->flags & CSIO_HWF_FWEVT_PENDING)) { in csio_nondata_isr()
64 hw->flags |= CSIO_HWF_FWEVT_PENDING; in csio_nondata_isr()
65 spin_unlock_irqrestore(&hw->lock, flags); in csio_nondata_isr()
[all …]
H A Dcsio_hw.c102 static void csio_hw_initialize(struct csio_hw *hw);
103 static void csio_evtq_stop(struct csio_hw *hw);
104 static void csio_evtq_start(struct csio_hw *hw);
106 int csio_is_hw_ready(struct csio_hw *hw) in csio_is_hw_ready() argument
108 return csio_match_state(hw, csio_hws_ready); in csio_is_hw_ready()
111 int csio_is_hw_removing(struct csio_hw *hw) in csio_is_hw_removing() argument
113 return csio_match_state(hw, csio_hws_removing); in csio_is_hw_removing()
119 * @hw: the HW module
133 csio_hw_wait_op_done_val(struct csio_hw *hw, int reg, uint32_t mask, in csio_hw_wait_op_done_val() argument
138 val = csio_rd_reg32(hw, reg); in csio_hw_wait_op_done_val()
[all …]
/linux/drivers/spi/
H A Dspi-altera-core.c43 static int altr_spi_writel(struct altera_spi *hw, unsigned int reg, in altr_spi_writel() argument
48 ret = regmap_write(hw->regmap, hw->regoff + reg, val); in altr_spi_writel()
50 dev_err(hw->dev, "fail to write reg 0x%x val 0x%x: %d\n", in altr_spi_writel()
56 static int altr_spi_readl(struct altera_spi *hw, unsigned int reg, in altr_spi_readl() argument
61 ret = regmap_read(hw->regmap, hw->regoff + reg, val); in altr_spi_readl()
63 dev_err(hw->dev, "fail to read reg 0x%x: %d\n", reg, ret); in altr_spi_readl()
75 struct altera_spi *hw = altera_spi_to_hw(spi); in altera_spi_set_cs() local
78 hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK; in altera_spi_set_cs()
79 altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr); in altera_spi_set_cs()
80 altr_spi_writel(hw, ALTERA_SPI_TARGET_SEL, 0); in altera_spi_set_cs()
[all …]
/linux/drivers/net/fjes/
H A Dfjes_hw.c23 u32 fjes_hw_rd32(struct fjes_hw *hw, u32 reg) in fjes_hw_rd32() argument
25 u8 *base = hw->base; in fjes_hw_rd32()
33 static u8 *fjes_hw_iomap(struct fjes_hw *hw) in fjes_hw_iomap() argument
37 if (!request_mem_region(hw->hw_res.start, hw->hw_res.size, in fjes_hw_iomap()
43 base = (u8 *)ioremap(hw->hw_res.start, hw->hw_res.size); in fjes_hw_iomap()
48 static void fjes_hw_iounmap(struct fjes_hw *hw) in fjes_hw_iounmap() argument
50 iounmap(hw->base); in fjes_hw_iounmap()
51 release_mem_region(hw->hw_res.start, hw->hw_res.size); in fjes_hw_iounmap()
54 int fjes_hw_reset(struct fjes_hw *hw) in fjes_hw_reset() argument
74 static int fjes_hw_get_max_epid(struct fjes_hw *hw) in fjes_hw_get_max_epid() argument
[all …]
/linux/drivers/scsi/elx/efct/
H A Defct_hw.c34 efct_hw_link_event_init(struct efct_hw *hw) in efct_hw_link_event_init() argument
36 hw->link.status = SLI4_LINK_STATUS_MAX; in efct_hw_link_event_init()
37 hw->link.topology = SLI4_LINK_TOPO_NONE; in efct_hw_link_event_init()
38 hw->link.medium = SLI4_LINK_MEDIUM_MAX; in efct_hw_link_event_init()
39 hw->link.speed = 0; in efct_hw_link_event_init()
40 hw->link.loop_map = NULL; in efct_hw_link_event_init()
41 hw->link.fc_id = U32_MAX; in efct_hw_link_event_init()
47 efct_hw_read_max_dump_size(struct efct_hw *hw) in efct_hw_read_max_dump_size() argument
50 struct efct *efct = hw->os; in efct_hw_read_max_dump_size()
58 if (sli_cmd_common_set_dump_location(&hw->sli, buf, 1, 0, NULL, 0)) in efct_hw_read_max_dump_size()
[all …]
/linux/drivers/net/ethernet/marvell/
H A Dskge.c94 static int xm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val);
95 static int gm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val);
98 static void yukon_init(struct skge_hw *hw, int port);
99 static void genesis_mac_init(struct skge_hw *hw, int port);
112 static inline bool is_genesis(const struct skge_hw *hw) in is_genesis() argument
115 return hw->chip_id == CHIP_ID_GENESIS; in is_genesis()
135 const void __iomem *io = skge->hw->regs; in skge_get_regs()
148 static u32 wol_supported(const struct skge_hw *hw) in wol_supported() argument
150 if (is_genesis(hw)) in wol_supported()
153 if (hw->chip_id == CHIP_ID_YUKON && hw->chip_rev == 0) in wol_supported()
[all …]
H A Dsky2.c151 static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val) in gm_phy_write() argument
155 gma_write16(hw, port, GM_SMI_DATA, val); in gm_phy_write()
156 gma_write16(hw, port, GM_SMI_CTRL, in gm_phy_write()
160 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL); in gm_phy_write()
170 dev_warn(&hw->pdev->dev, "%s: phy write timeout\n", hw->dev[port]->name); in gm_phy_write()
174 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name); in gm_phy_write()
178 static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val) in __gm_phy_read() argument
182 gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) in __gm_phy_read()
186 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL); in __gm_phy_read()
191 *val = gma_read16(hw, port, GM_SMI_DATA); in __gm_phy_read()
[all …]
/linux/drivers/clk/sunxi-ng/
H A Dccu-sun5i.c34 .hw.init = CLK_HW_INIT("pll-core",
74 .hw.init = CLK_HW_INIT("pll-audio-base",
91 .hw.init = CLK_HW_INIT("pll-video0",
106 .hw.init = CLK_HW_INIT("pll-ve",
119 .hw.init = CLK_HW_INIT("pll-ddr-base",
134 .hw.init = CLK_HW_INIT("pll-ddr-other", "pll-ddr-base",
148 .hw.init = CLK_HW_INIT("pll-periph",
165 .hw.init = CLK_HW_INIT("pll-video1",
190 .hw.init = CLK_HW_INIT_PARENTS("cpu",
214 .hw.init = CLK_HW_INIT_PARENTS("ahb",
[all …]
/linux/drivers/tty/ipwireless/
H A Dhardware.c31 static void ipw_send_setup_packet(struct ipw_hardware *hw);
37 static void handle_received_CTRL_packet(struct ipw_hardware *hw,
239 /* Flag if hw is ready to send next packet */
404 static void do_send_fragment(struct ipw_hardware *hw, unsigned char *data, in do_send_fragment() argument
411 BUG_ON(length > hw->ll_mtu); in do_send_fragment()
416 spin_lock_irqsave(&hw->lock, flags); in do_send_fragment()
418 hw->tx_ready = 0; in do_send_fragment()
421 if (hw->hw_version == HW_VERSION_1) { in do_send_fragment()
422 outw((unsigned short) length, hw->base_port + IODWR); in do_send_fragment()
431 outw(raw_data, hw->base_port + IODWR); in do_send_fragment()
[all …]
/linux/drivers/net/ethernet/intel/ice/
H A Dice_ptp_hw.c198 * @hw: pointer to HW struct
203 u8 ice_get_ptp_src_clock_index(struct ice_hw *hw) in ice_get_ptp_src_clock_index() argument
205 return hw->func_caps.ts_func_info.tmr_index_assoc; in ice_get_ptp_src_clock_index()
210 * @hw: pointer to HW struct
214 static u64 ice_ptp_read_src_incval(struct ice_hw *hw) in ice_ptp_read_src_incval() argument
219 tmr_idx = ice_get_ptp_src_clock_index(hw); in ice_ptp_read_src_incval()
221 lo = rd32(hw, GLTSYN_INCVAL_L(tmr_idx)); in ice_ptp_read_src_incval()
222 hi = rd32(hw, GLTSYN_INCVAL_ in ice_ptp_read_src_incval()
235 ice_ptp_tmr_cmd_to_src_reg(struct ice_hw * hw,enum ice_ptp_tmr_cmd cmd) ice_ptp_tmr_cmd_to_src_reg() argument
280 ice_ptp_tmr_cmd_to_port_reg(struct ice_hw * hw,enum ice_ptp_tmr_cmd cmd) ice_ptp_tmr_cmd_to_port_reg() argument
333 ice_ptp_src_cmd(struct ice_hw * hw,enum ice_ptp_tmr_cmd cmd) ice_ptp_src_cmd() argument
352 ice_ptp_exec_tmr_cmd(struct ice_hw * hw) ice_ptp_exec_tmr_cmd() argument
369 ice_ptp_cfg_sync_delay(const struct ice_hw * hw,u32 delay) ice_ptp_cfg_sync_delay() argument
388 ice_ptp_init_phc_e825c(struct ice_hw * hw) ice_ptp_init_phc_e825c() argument
412 ice_ptp_get_dest_dev_e825(struct ice_hw * hw,u8 port) ice_ptp_get_dest_dev_e825() argument
441 ice_write_phy_eth56g(struct ice_hw * hw,u8 port,u32 addr,u32 val) ice_write_phy_eth56g() argument
469 ice_read_phy_eth56g(struct ice_hw * hw,u8 port,u32 addr,u32 * val) ice_read_phy_eth56g() argument
501 ice_phy_res_address_eth56g(struct ice_hw * hw,u8 lane,enum eth56g_res_type res_type,u32 offset,u32 * addr) ice_phy_res_address_eth56g() argument
530 ice_write_port_eth56g(struct ice_hw * hw,u8 port,u32 offset,u32 val,enum eth56g_res_type res_type) ice_write_port_eth56g() argument
559 ice_read_port_eth56g(struct ice_hw * hw,u8 port,u32 offset,u32 * val,enum eth56g_res_type res_type) ice_read_port_eth56g() argument
587 ice_write_ptp_reg_eth56g(struct ice_hw * hw,u8 port,u16 offset,u32 val) ice_write_ptp_reg_eth56g() argument
606 ice_write_mac_reg_eth56g(struct ice_hw * hw,u8 port,u32 offset,u32 val) ice_write_mac_reg_eth56g() argument
624 ice_write_xpcs_reg_eth56g(struct ice_hw * hw,u8 port,u32 offset,u32 val) ice_write_xpcs_reg_eth56g() argument
643 ice_read_ptp_reg_eth56g(struct ice_hw * hw,u8 port,u16 offset,u32 * val) ice_read_ptp_reg_eth56g() argument
661 ice_read_mac_reg_eth56g(struct ice_hw * hw,u8 port,u16 offset,u32 * val) ice_read_mac_reg_eth56g() argument
679 ice_read_gpcs_reg_eth56g(struct ice_hw * hw,u8 port,u16 offset,u32 * val) ice_read_gpcs_reg_eth56g() argument
697 ice_read_port_mem_eth56g(struct ice_hw * hw,u8 port,u16 offset,u32 * val) ice_read_port_mem_eth56g() argument
715 ice_write_port_mem_eth56g(struct ice_hw * hw,u8 port,u16 offset,u32 val) ice_write_port_mem_eth56g() argument
733 ice_write_quad_ptp_reg_eth56g(struct ice_hw * hw,u8 port,u32 offset,u32 val) ice_write_quad_ptp_reg_eth56g() argument
758 ice_read_quad_ptp_reg_eth56g(struct ice_hw * hw,u8 port,u32 offset,u32 * val) ice_read_quad_ptp_reg_eth56g() argument
855 ice_read_64b_phy_reg_eth56g(struct ice_hw * hw,u8 port,u16 low_addr,u64 * val,enum eth56g_res_type res_type) ice_read_64b_phy_reg_eth56g() argument
900 ice_read_64b_ptp_reg_eth56g(struct ice_hw * hw,u8 port,u16 low_addr,u64 * val) ice_read_64b_ptp_reg_eth56g() argument
924 ice_write_40b_phy_reg_eth56g(struct ice_hw * hw,u8 port,u16 low_addr,u64 val,enum eth56g_res_type res_type) ice_write_40b_phy_reg_eth56g() argument
971 ice_write_40b_ptp_reg_eth56g(struct ice_hw * hw,u8 port,u16 low_addr,u64 val) ice_write_40b_ptp_reg_eth56g() argument
994 ice_write_64b_phy_reg_eth56g(struct ice_hw * hw,u8 port,u16 low_addr,u64 val,enum eth56g_res_type res_type) ice_write_64b_phy_reg_eth56g() argument
1040 ice_write_64b_ptp_reg_eth56g(struct ice_hw * hw,u8 port,u16 low_addr,u64 val) ice_write_64b_ptp_reg_eth56g() argument
1061 ice_read_ptp_tstamp_eth56g(struct ice_hw * hw,u8 port,u8 idx,u64 * tstamp) ice_read_ptp_tstamp_eth56g() argument
1115 ice_clear_ptp_tstamp_eth56g(struct ice_hw * hw,u8 port,u8 idx) ice_clear_ptp_tstamp_eth56g() argument
1146 ice_ptp_reset_ts_memory_eth56g(struct ice_hw * hw) ice_ptp_reset_ts_memory_eth56g() argument
1170 ice_ptp_prep_port_time_eth56g(struct ice_hw * hw,u8 port,u64 time) ice_ptp_prep_port_time_eth56g() argument
1200 ice_ptp_prep_phy_time_eth56g(struct ice_hw * hw,u32 time) ice_ptp_prep_phy_time_eth56g() argument
1243 ice_ptp_prep_port_adj_eth56g(struct ice_hw * hw,u8 port,s64 time) ice_ptp_prep_port_adj_eth56g() argument
1294 ice_ptp_prep_phy_adj_eth56g(struct ice_hw * hw,s32 adj) ice_ptp_prep_phy_adj_eth56g() argument
1330 ice_ptp_prep_phy_incval_eth56g(struct ice_hw * hw,u64 incval) ice_ptp_prep_phy_incval_eth56g() argument
1362 ice_ptp_read_port_capture_eth56g(struct ice_hw * hw,u8 port,u64 * tx_ts,u64 * rx_ts) ice_ptp_read_port_capture_eth56g() argument
1404 ice_ptp_write_port_cmd_eth56g(struct ice_hw * hw,u8 port,enum ice_ptp_tmr_cmd cmd) ice_ptp_write_port_cmd_eth56g() argument
1487 ice_phy_cfg_parpcs_eth56g(struct ice_hw * hw,u8 port) ice_phy_cfg_parpcs_eth56g() argument
1555 ice_phy_cfg_ptp_1step_eth56g(struct ice_hw * hw,u8 port) ice_phy_cfg_ptp_1step_eth56g() argument
1655 ice_ptp_calc_bitslip_eth56g(struct ice_hw * hw,u8 port,u32 bs,bool fc,bool rs,enum ice_eth56g_link_spd spd) ice_ptp_calc_bitslip_eth56g() argument
1705 ice_ptp_calc_deskew_eth56g(struct ice_hw * hw,u8 port,u32 ds,bool rs,enum ice_eth56g_link_spd spd) ice_ptp_calc_deskew_eth56g() argument
1748 ice_phy_set_offsets_eth56g(struct ice_hw * hw,u8 port,enum ice_eth56g_link_spd spd,const struct ice_eth56g_mac_reg_cfg * cfg,bool fc,bool rs) ice_phy_set_offsets_eth56g() argument
1802 ice_phy_cfg_mac_eth56g(struct ice_hw * hw,u8 port) ice_phy_cfg_mac_eth56g() argument
1883 ice_phy_cfg_intr_eth56g(struct ice_hw * hw,u8 port,bool ena,u8 threshold) ice_phy_cfg_intr_eth56g() argument
1943 ice_read_phy_and_phc_time_eth56g(struct ice_hw * hw,u8 port,u64 * phy_time,u64 * phc_time) ice_read_phy_and_phc_time_eth56g() argument
2010 ice_sync_phy_timer_eth56g(struct ice_hw * hw,u8 port) ice_sync_phy_timer_eth56g() argument
2077 ice_stop_phy_timer_eth56g(struct ice_hw * hw,u8 port,bool soft_reset) ice_stop_phy_timer_eth56g() argument
2107 ice_start_phy_timer_eth56g(struct ice_hw * hw,u8 port) ice_start_phy_timer_eth56g() argument
2192 ice_check_phy_tx_tstamp_ready_eth56g(struct ice_hw * hw) ice_check_phy_tx_tstamp_ready_eth56g() argument
2223 ice_ptp_read_tx_hwtstamp_status_eth56g(struct ice_hw * hw,u32 * ts_status) ice_ptp_read_tx_hwtstamp_status_eth56g() argument
2271 ice_ptp_phy_soft_reset_eth56g(struct ice_hw * hw,u8 port) ice_ptp_phy_soft_reset_eth56g() argument
2330 ice_get_phy_tx_tstamp_ready_eth56g(struct ice_hw * hw,u8 port,u64 * tstamp_ready) ice_get_phy_tx_tstamp_ready_eth56g() argument
2350 ice_ptp_init_phy_e825(struct ice_hw * hw) ice_ptp_init_phy_e825() argument
2376 ice_fill_phy_msg_e82x(struct ice_hw * hw,struct ice_sbq_msg_input * msg,u8 port,u16 offset) ice_fill_phy_msg_e82x() argument
2505 ice_read_phy_reg_e82x(struct ice_hw * hw,u8 port,u16 offset,u32 * val) ice_read_phy_reg_e82x() argument
2538 ice_read_64b_phy_reg_e82x(struct ice_hw * hw,u8 port,u16 low_addr,u64 * val) ice_read_64b_phy_reg_e82x() argument
2582 ice_write_phy_reg_e82x(struct ice_hw * hw,u8 port,u16 offset,u32 val) ice_write_phy_reg_e82x() argument
2612 ice_write_40b_phy_reg_e82x(struct ice_hw * hw,u8 port,u16 low_addr,u64 val) ice_write_40b_phy_reg_e82x() argument
2659 ice_write_64b_phy_reg_e82x(struct ice_hw * hw,u8 port,u16 low_addr,u64 val) ice_write_64b_phy_reg_e82x() argument
2708 ice_fill_quad_msg_e82x(struct ice_hw * hw,struct ice_sbq_msg_input * msg,u8 quad,u16 offset) ice_fill_quad_msg_e82x() argument
2741 ice_read_quad_reg_e82x(struct ice_hw * hw,u8 quad,u16 offset,u32 * val) ice_read_quad_reg_e82x() argument
2775 ice_write_quad_reg_e82x(struct ice_hw * hw,u8 quad,u16 offset,u32 val) ice_write_quad_reg_e82x() argument
2809 ice_read_phy_tstamp_e82x(struct ice_hw * hw,u8 quad,u8 idx,u64 * tstamp) ice_read_phy_tstamp_e82x() argument
2865 ice_clear_phy_tstamp_e82x(struct ice_hw * hw,u8 quad,u8 idx) ice_clear_phy_tstamp_e82x() argument
2888 ice_ptp_reset_ts_memory_quad_e82x(struct ice_hw * hw,u8 quad) ice_ptp_reset_ts_memory_quad_e82x() argument
2898 ice_ptp_reset_ts_memory_e82x(struct ice_hw * hw) ice_ptp_reset_ts_memory_e82x() argument
2912 ice_ptp_set_vernier_wl(struct ice_hw * hw) ice_ptp_set_vernier_wl() argument
2937 ice_ptp_init_phc_e82x(struct ice_hw * hw) ice_ptp_init_phc_e82x() argument
2963 ice_ptp_prep_phy_time_e82x(struct ice_hw * hw,u32 time) ice_ptp_prep_phy_time_e82x() argument
3015 ice_ptp_prep_port_adj_e82x(struct ice_hw * hw,u8 port,s64 time) ice_ptp_prep_port_adj_e82x() argument
3063 ice_ptp_prep_phy_adj_e82x(struct ice_hw * hw,s32 adj) ice_ptp_prep_phy_adj_e82x() argument
3098 ice_ptp_prep_phy_incval_e82x(struct ice_hw * hw,u64 incval) ice_ptp_prep_phy_incval_e82x() argument
3131 ice_ptp_read_port_capture(struct ice_hw * hw,u8 port,u64 * tx_ts,u64 * rx_ts) ice_ptp_read_port_capture() argument
3175 ice_ptp_write_port_cmd_e82x(struct ice_hw * hw,u8 port,enum ice_ptp_tmr_cmd cmd) ice_ptp_write_port_cmd_e82x() argument
3219 ice_phy_get_speed_and_fec_e82x(struct ice_hw * hw,u8 port,enum ice_ptp_link_spd * link_out,enum ice_ptp_fec_mode * fec_out) ice_phy_get_speed_and_fec_e82x() argument
3289 ice_phy_cfg_lane_e82x(struct ice_hw * hw,u8 port) ice_phy_cfg_lane_e82x() argument
3371 ice_phy_cfg_uix_e82x(struct ice_hw * hw,u8 port) ice_phy_cfg_uix_e82x() argument
3453 ice_phy_cfg_parpcs_e82x(struct ice_hw * hw,u8 port) ice_phy_cfg_parpcs_e82x() argument
3580 ice_calc_fixed_tx_offset_e82x(struct ice_hw * hw,enum ice_ptp_link_spd link_spd) ice_calc_fixed_tx_offset_e82x() argument
3626 ice_phy_cfg_tx_offset_e82x(struct ice_hw * hw,u8 port) ice_phy_cfg_tx_offset_e82x() argument
3726 ice_phy_calc_pmd_adj_e82x(struct ice_hw * hw,u8 port,enum ice_ptp_link_spd link_spd,enum ice_ptp_fec_mode fec_mode,u64 * pmd_adj) ice_phy_calc_pmd_adj_e82x() argument
3879 ice_calc_fixed_rx_offset_e82x(struct ice_hw * hw,enum ice_ptp_link_spd link_spd) ice_calc_fixed_rx_offset_e82x() argument
3929 ice_phy_cfg_rx_offset_e82x(struct ice_hw * hw,u8 port) ice_phy_cfg_rx_offset_e82x() argument
4032 ice_ptp_clear_phy_offset_ready_e82x(struct ice_hw * hw) ice_ptp_clear_phy_offset_ready_e82x() argument
4068 ice_read_phy_and_phc_time_e82x(struct ice_hw * hw,u8 port,u64 * phy_time,u64 * phc_time) ice_read_phy_and_phc_time_e82x() argument
4126 ice_sync_phy_timer_e82x(struct ice_hw * hw,u8 port) ice_sync_phy_timer_e82x() argument
4196 ice_stop_phy_timer_e82x(struct ice_hw * hw,u8 port,bool soft_reset) ice_stop_phy_timer_e82x() argument
4246 ice_start_phy_timer_e82x(struct ice_hw * hw,u8 port) ice_start_phy_timer_e82x() argument
4343 ice_get_phy_tx_tstamp_ready_e82x(struct ice_hw * hw,u8 quad,u64 * tstamp_ready) ice_get_phy_tx_tstamp_ready_e82x() argument
4377 ice_check_phy_tx_tstamp_ready_e82x(struct ice_hw * hw) ice_check_phy_tx_tstamp_ready_e82x() argument
4408 ice_phy_cfg_intr_e82x(struct ice_hw * hw,u8 quad,bool ena,u8 threshold) ice_phy_cfg_intr_e82x() argument
4451 ice_read_phy_reg_e810(struct ice_hw * hw,u32 addr,u32 * val) ice_read_phy_reg_e810() argument
4481 ice_write_phy_reg_e810(struct ice_hw * hw,u32 addr,u32 val) ice_write_phy_reg_e810() argument
4514 ice_read_phy_tstamp_ll_e810(struct ice_hw * hw,u8 idx,u8 * hi,u32 * lo) ice_read_phy_tstamp_ll_e810() argument
4569 ice_read_phy_tstamp_sbq_e810(struct ice_hw * hw,u8 lport,u8 idx,u8 * hi,u32 * lo) ice_read_phy_tstamp_sbq_e810() argument
4608 ice_read_phy_tstamp_e810(struct ice_hw * hw,u8 lport,u8 idx,u64 * tstamp) ice_read_phy_tstamp_e810() argument
4643 ice_clear_phy_tstamp_e810(struct ice_hw * hw,u8 lport,u8 idx) ice_clear_phy_tstamp_e810() argument
4684 ice_ptp_init_phc_e810(struct ice_hw * hw) ice_ptp_init_phc_e810() argument
4713 ice_ptp_prep_phy_time_e810(struct ice_hw * hw,u32 time) ice_ptp_prep_phy_time_e810() argument
4746 ice_ptp_prep_phy_adj_ll_e810(struct ice_hw * hw,s32 adj) ice_ptp_prep_phy_adj_ll_e810() argument
4798 ice_ptp_prep_phy_adj_e810(struct ice_hw * hw,s32 adj) ice_ptp_prep_phy_adj_e810() argument
4838 ice_ptp_prep_phy_incval_ll_e810(struct ice_hw * hw,u64 incval) ice_ptp_prep_phy_incval_ll_e810() argument
4887 ice_ptp_prep_phy_incval_e810(struct ice_hw * hw,u64 incval) ice_ptp_prep_phy_incval_e810() argument
4925 ice_ptp_port_cmd_e810(struct ice_hw * hw,enum ice_ptp_tmr_cmd cmd) ice_ptp_port_cmd_e810() argument
4942 ice_get_phy_tx_tstamp_ready_e810(struct ice_hw * hw,u8 port,u64 * tstamp_ready) ice_get_phy_tx_tstamp_ready_e810() argument
4960 ice_check_phy_tx_tstamp_ready_e810(struct ice_hw * hw) ice_check_phy_tx_tstamp_ready_e810() argument
4979 ice_read_sma_ctrl(struct ice_hw * hw,u8 * data) ice_read_sma_ctrl() argument
5012 ice_write_sma_ctrl(struct ice_hw * hw,u8 data) ice_write_sma_ctrl() argument
5044 ice_ptp_read_sdp_ac(struct ice_hw * hw,__le16 * entries,uint * num_entries) ice_ptp_read_sdp_ac() argument
5119 ice_ptp_init_phc_e830(const struct ice_hw * hw) ice_ptp_init_phc_e830() argument
5133 ice_ptp_write_direct_incval_e830(const struct ice_hw * hw,u64 incval) ice_ptp_write_direct_incval_e830() argument
5154 ice_ptp_write_direct_phc_time_e830(const struct ice_hw * hw,u64 time) ice_ptp_write_direct_phc_time_e830() argument
5174 ice_ptp_port_cmd_e830(struct ice_hw * hw,enum ice_ptp_tmr_cmd cmd) ice_ptp_port_cmd_e830() argument
5190 ice_read_phy_tstamp_e830(const struct ice_hw * hw,u8 idx,u64 * tstamp) ice_read_phy_tstamp_e830() argument
5211 ice_get_phy_tx_tstamp_ready_e830(const struct ice_hw * hw,u8 port,u64 * tstamp_ready) ice_get_phy_tx_tstamp_ready_e830() argument
5225 ice_check_phy_tx_tstamp_ready_e830(struct ice_hw * hw) ice_check_phy_tx_tstamp_ready_e830() argument
5265 ice_ptp_lock(struct ice_hw * hw) ice_ptp_lock() argument
5298 ice_ptp_unlock(struct ice_hw * hw) ice_ptp_unlock() argument
5315 ice_ptp_init_hw(struct ice_hw * hw) ice_ptp_init_hw() argument
5352 ice_ptp_write_port_cmd(struct ice_hw * hw,u8 port,enum ice_ptp_tmr_cmd cmd) ice_ptp_write_port_cmd() argument
5379 ice_ptp_one_port_cmd(struct ice_hw * hw,u8 configured_port,enum ice_ptp_tmr_cmd configured_cmd) ice_ptp_one_port_cmd() argument
5415 ice_ptp_port_cmd(struct ice_hw * hw,enum ice_ptp_tmr_cmd cmd) ice_ptp_port_cmd() argument
5451 ice_ptp_tmr_cmd(struct ice_hw * hw,enum ice_ptp_tmr_cmd cmd) ice_ptp_tmr_cmd() argument
5487 ice_ptp_init_time(struct ice_hw * hw,u64 time) ice_ptp_init_time() argument
5542 ice_ptp_write_incval(struct ice_hw * hw,u64 incval) ice_ptp_write_incval() argument
5586 ice_ptp_write_incval_locked(struct ice_hw * hw,u64 incval) ice_ptp_write_incval_locked() argument
5613 ice_ptp_adj_clock(struct ice_hw * hw,s32 adj) ice_ptp_adj_clock() argument
5662 ice_read_phy_tstamp(struct ice_hw * hw,u8 block,u8 idx,u64 * tstamp) ice_read_phy_tstamp() argument
5695 ice_clear_phy_tstamp(struct ice_hw * hw,u8 block,u8 idx) ice_clear_phy_tstamp() argument
5717 ice_get_pf_c827_idx(struct ice_hw * hw,u8 * idx) ice_get_pf_c827_idx() argument
5758 ice_ptp_reset_ts_memory(struct ice_hw * hw) ice_ptp_reset_ts_memory() argument
5779 ice_ptp_init_phc(struct ice_hw * hw) ice_ptp_init_phc() argument
5815 ice_get_phy_tx_tstamp_ready(struct ice_hw * hw,u8 block,u64 * tstamp_ready) ice_get_phy_tx_tstamp_ready() argument
5846 ice_check_phy_tx_tstamp_ready(struct ice_hw * hw) ice_check_phy_tx_tstamp_ready() argument
5871 ice_cgu_get_pin_desc_e823(struct ice_hw * hw,bool input,int * size) ice_cgu_get_pin_desc_e823() argument
5910 ice_cgu_get_pin_desc(struct ice_hw * hw,bool input,int * size) ice_cgu_get_pin_desc() argument
5959 ice_cgu_get_num_pins(struct ice_hw * hw,bool input) ice_cgu_get_num_pins() argument
5979 ice_cgu_get_pin_type(struct ice_hw * hw,u8 pin,bool input) ice_cgu_get_pin_type() argument
6007 ice_cgu_get_pin_freq_supp(struct ice_hw * hw,u8 pin,bool input,u8 * num) ice_cgu_get_pin_freq_supp() argument
6033 ice_cgu_get_pin_name(struct ice_hw * hw,u8 pin,bool input) ice_cgu_get_pin_name() argument
6066 ice_get_cgu_state(struct ice_hw * hw,u8 dpll_idx,enum dpll_lock_status last_dpll_state,u8 * pin,u8 * ref_state,u8 * eec_mode,s64 * phase_offset,enum dpll_lock_status * dpll_state) ice_get_cgu_state() argument
6128 ice_get_cgu_rclk_pin_info(struct ice_hw * hw,u8 * base_idx,u8 * pin_num) ice_get_cgu_rclk_pin_info() argument
6191 ice_cgu_get_output_pin_state_caps(struct ice_hw * hw,u8 pin_id,unsigned long * caps) ice_cgu_get_output_pin_state_caps() argument
[all...]
/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_common.h10 u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
11 int ixgbe_init_hw_generic(struct ixgbe_hw *hw);
12 int ixgbe_start_hw_generic(struct ixgbe_hw *hw);
13 int ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
14 int ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
15 int ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
17 int ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);
20 int ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
21 void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
22 int ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);
[all …]
H A Dixgbe_82598.c19 static int ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw,
22 static int ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,
27 * @hw: pointer to the HW structure
35 static void ixgbe_set_pcie_completion_timeout(struct ixgbe_hw *hw) in ixgbe_set_pcie_completion_timeout() argument
37 u32 gcr = IXGBE_READ_REG(hw, IXGBE_GCR); in ixgbe_set_pcie_completion_timeout()
40 if (ixgbe_removed(hw->hw_addr)) in ixgbe_set_pcie_completion_timeout()
61 pcie_devctl2 = ixgbe_read_pci_cfg_word(hw, IXGBE_PCI_DEVICE_CONTROL2); in ixgbe_set_pcie_completion_timeout()
63 ixgbe_write_pci_cfg_word(hw, IXGBE_PCI_DEVICE_CONTROL2, pcie_devctl2); in ixgbe_set_pcie_completion_timeout()
67 IXGBE_WRITE_REG(hw, IXGBE_GCR, gcr); in ixgbe_set_pcie_completion_timeout()
70 static int ixgbe_get_invariants_82598(struct ixgbe_hw *hw) in ixgbe_get_invariants_82598() argument
[all …]
/linux/drivers/net/ethernet/intel/e1000e/
H A D80003es2lan.c21 static s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw);
22 static s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);
23 static void e1000_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);
24 static void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw);
25 static void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw);
26 static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw);
27 static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex);
28 static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
30 static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
32 static void e1000_power_down_phy_copper_80003es2lan(struct e1000_hw *hw);
[all …]
/linux/sound/pci/ctxfi/
H A Dctsrc.c36 struct hw *hw; in src_set_state() local
38 hw = src->rsc.hw; in src_set_state()
39 hw->src_set_state(src->rsc.ctrl_blk, state); in src_set_state()
46 struct hw *hw; in src_set_bm() local
48 hw = src->rsc.hw; in src_set_bm()
49 hw in src_set_bm()
56 struct hw *hw; src_set_sf() local
66 struct hw *hw; src_set_pm() local
76 struct hw *hw; src_set_rom() local
86 struct hw *hw; src_set_vo() local
96 struct hw *hw; src_set_st() local
106 struct hw *hw; src_set_bp() local
116 struct hw *hw; src_set_cisz() local
126 struct hw *hw; src_set_ca() local
136 struct hw *hw; src_set_sa() local
146 struct hw *hw; src_set_la() local
156 struct hw *hw; src_set_pitch() local
166 struct hw *hw; src_set_clear_zbufs() local
176 struct hw *hw; src_commit_write() local
206 struct hw *hw; src_get_ca() local
227 struct hw *hw = src->rsc.hw; src_default_config_memrd() local
267 struct hw *hw = src->rsc.hw; src_default_config_memwr() local
295 struct hw *hw = src->rsc.hw; src_default_config_arcrw() local
482 struct hw *hw = mgr->mgr.hw; src_enable_s() local
498 struct hw *hw = mgr->mgr.hw; src_enable() local
514 struct hw *hw = mgr->mgr.hw; src_disable() local
530 struct hw *hw = mgr->mgr.hw; src_mgr_commit_write() local
537 src_mgr_create(struct hw * hw,void ** rsrc_mgr) src_mgr_create() argument
769 struct hw *hw = mgr->hw; srcimp_map_op() local
806 srcimp_mgr_create(struct hw * hw,void ** rsrcimp_mgr) srcimp_mgr_create() argument
[all...]

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