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/linux/arch/arm64/boot/dts/apple/
H A Dt600x-common.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
11 #address-cells = <2>;
12 #size-cells = <2>;
19 #address-cells = <2>;
20 #size-cells = <0>;
22 cpu-map {
67 enable-method = "spin-table";
68 cpu-release-addr = <0 0>; /* To be filled by loader */
69 next-level-cache = <&l2_cache_0>;
70 i-cache-size = <0x20000>;
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/linux/drivers/net/wireless/ath/ath10k/
H A Dcore.c1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
6 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
18 #include <linux/nvmem-consumer.h>
30 #include "wmi-ops.h"
60 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
476 * or 2x2 160Mhz, long-guard-interval.
527 * 1x1 160Mhz, long-guard-interval.
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H A Ddebug.c1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
21 #include "wmi-ops.h"
37 dev_info(ar->dev, "%pV", &vaf); in ath10k_info()
52 ar->hw_params.name, in ath10k_debug_print_hwfw_info()
53 ar->target_version, in ath10k_debug_print_hwfw_info()
54 ar->bus_param.chip_id, in ath10k_debug_print_hwfw_info()
55 ar->id.subsystem_vendor, ar->id.subsystem_device); in ath10k_debug_print_hwfw_info()
64 firmware = ar->normal_mode_fw.fw_file.firmware; in ath10k_debug_print_hwfw_info()
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/linux/drivers/memory/tegra/
H A Dtegra124-emc.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/clk-provider.h>
15 #include <linux/interconnect-provider.h>
512 /* protect shared rate-change code path */
521 writel(value, emc->regs + EMC_CCFIFO_DATA); in emc_ccfifo_writel()
522 writel(offset, emc->regs + EMC_CCFIFO_ADDR); in emc_ccfifo_writel()
530 writel(1, emc->regs + EMC_TIMING_CONTROL); in emc_seq_update_timing()
533 value = readl(emc->regs + EMC_STATUS); in emc_seq_update_timing()
539 dev_err(emc->dev, "timing update timed out\n"); in emc_seq_update_timing()
547 writel(0, emc->regs + EMC_AUTO_CAL_INTERVAL); in emc_seq_disable_auto_cal()
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H A Dtegra30-emc.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Based on downstream driver from NVIDIA and tegra124-emc.c
6 * Copyright (C) 2011-2014 NVIDIA Corporation
9 * Copyright (C) 2019 GRATE-DRIVER project
18 #include <linux/interconnect-provider.h>
392 /* protect shared rate-change code path */
403 writel_relaxed(EMC_TIMING_UPDATE, emc->regs + EMC_TIMING_CONTROL); in emc_seq_update_timing()
405 err = readl_relaxed_poll_timeout_atomic(emc->regs + EMC_STATUS, val, in emc_seq_update_timing()
409 dev_err(emc->dev, "failed to update timing: %d\n", err); in emc_seq_update_timing()
422 status = readl_relaxed(emc->regs + EMC_INTSTATUS) & intmask; in tegra_emc_isr()
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/linux/drivers/staging/rtl8723bs/include/
H A Dhal_com_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
32 #define REG_GPIO_IO_SEL_2 0x0062 /* RTL8723 WIFI/BT/GPS Multi-Function GPIO Select. */
33 #define REG_MULTI_FUNC_CTRL 0x0068 /* RTL8723 WIFI/BT/GPS Multi-Function control source. */
112 /* Format for offset 540h-542h: */
113 /* [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBT…
115 /* [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet.…
119 /* |<--Setup--|--Hold------------>| */
120 /* --------------|---------------------- */
123 /* Note: We cannot update beacon content to HW or send any AC packets during the time between Setu…
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/linux/drivers/bluetooth/
H A Dhci_bcm4377.c1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
11 #include <linux/dma-mapping.h>
256 * - virtual: set if there is no associated shared memory and only the
258 * - sync: only set for the SCO rings
404 * payload_size: optional in-place payload size
405 * mapped_payload_size: optional out-of-place payload size
411 * setup a corresponding completion ring for device->host messages
413 * buffers used by device->host messages in the completion
483 * Chip-specific configuration struct
495 * vendor-specific subsystem control
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/linux/drivers/hid/
H A Dhid-nintendo.c1 // SPDX-License-Identifier: GPL-2.0+
3 * HID driver for Nintendo Switch Joy-Cons and Pro Controllers
5 * Copyright (c) 2019-2021 Daniel J. Ogorchock <djogorchock@gmail.com>
12 * https://gitlab.com/pjranki/joycon-linux-kernel (Peter Rankin)
16 * hid-wiimote kernel hid driver
17 * hid-logitech-hidpp driver
18 * hid-sony driver
20 * This driver supports the Nintendo Switch Joy-Cons and Pro Controllers. The
31 #include "hid-ids.h"
120 (JC_CAL_USR_LEFT_DATA_END - JC_CAL_USR_LEFT_DATA_ADDR + 1)
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/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-p1801-t.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/thermal/thermal.h>
9 #include "tegra30-cpu-opp.dtsi"
10 #include "tegra30-cpu-opp-microvolt.dtsi"
13 model = "Asus Portable AiO P1801-T";
14 compatible = "asus,p1801-t", "nvidia,tegra30";
15 chassis-type = "convertible";
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/linux/drivers/net/wireless/ralink/rt2x00/
H A Drt2800lib.c1 // SPDX-License-Identifier: GPL-2.0-or-later
24 #include <linux/crc-ccitt.h>
87 mutex_lock(&rt2x00dev->csr_mutex); in rt2800_bbp_write()
104 mutex_unlock(&rt2x00dev->csr_mutex); in rt2800_bbp_write()
112 mutex_lock(&rt2x00dev->csr_mutex); in rt2800_bbp_read()
136 mutex_unlock(&rt2x00dev->csr_mutex); in rt2800_bbp_read()
146 mutex_lock(&rt2x00dev->csr_mutex); in rt2800_rfcsr_write()
152 switch (rt2x00dev->chip.rt) { in rt2800_rfcsr_write()
179 mutex_unlock(&rt2x00dev->csr_mutex); in rt2800_rfcsr_write()
228 mutex_lock(&rt2x00dev->csr_mutex); in rt2800_rfcsr_read()
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/linux/drivers/clk/sprd/
H A Dsc9863a-clk.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/clk-provider.h>
16 #include <dt-bindings/clock/sprd,sc9863a-clk.h>
26 static SPRD_PLL_SC_GATE_CLK_FW_NAME(mpll0_gate, "mpll0-gate", "ext-26m", 0x94,
28 static SPRD_PLL_SC_GATE_CLK_FW_NAME(dpll0_gate, "dpll0-gate", "ext-26m", 0x98,
30 static SPRD_PLL_SC_GATE_CLK_FW_NAME(lpll_gate, "lpll-gate", "ext-26m", 0x9c,
32 static SPRD_PLL_SC_GATE_CLK_FW_NAME(gpll_gate, "gpll-gate", "ext-26m", 0xa8,
34 static SPRD_PLL_SC_GATE_CLK_FW_NAME(dpll1_gate, "dpll1-gate", "ext-26m", 0x1dc,
36 static SPRD_PLL_SC_GATE_CLK_FW_NAME(mpll1_gate, "mpll1-gate", "ext-26m", 0x1e0,
38 static SPRD_PLL_SC_GATE_CLK_FW_NAME(mpll2_gate, "mpll2-gate", "ext-26m", 0x1e4,
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/linux/drivers/net/wireless/ath/ath5k/
H A Dphy.c2 * Copyright (c) 2004-2007 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2009 Nick Kossifidis <mickflemm@gmail.com>
4 * Copyright (c) 2007-2008 Jiri Slaby <jirislaby@gmail.com>
5 * Copyright (c) 2008-2009 Felix Fietkau <nbd@openwrt.org>
42 * Here we handle the low-level functions related to baseband
44 * part of the hw code so make sure you know what you are doing.
48 * - Channel setting/switching
50 * - Automatic Gain Control (AGC) calibration
52 * - Noise Floor calibration
54 * - I/Q imbalance calibration (QAM correction)
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H A Deeprom.c2 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2009 Nick Kossifidis <mickflemm@gmail.com>
4 * Copyright (c) 2008-2009 Felix Fietkau <nbd@openwrt.org>
49 if (ee->ee_version > AR5K_EEPROM_VERSION_3_2) in ath5k_eeprom_bin2freq()
52 val = bin > 62 ? (10 * 62) + (5 * (bin - 62)) + 5100 : in ath5k_eeprom_bin2freq()
55 if (ee->ee_version > AR5K_EEPROM_VERSION_3_2) in ath5k_eeprom_bin2freq()
75 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_eeprom_init_header()
89 if (ah->ah_ee_version < AR5K_EEPROM_VERSION_3_0) in ath5k_eeprom_init_header()
101 eep_max = (eep_max | val) - AR5K_EEPROM_INFO_BASE; in ath5k_eeprom_init_header()
114 return -EIO; in ath5k_eeprom_init_header()
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/linux/include/linux/ssb/
H A Dssb_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
33 #define SSB_MAX_NR_CORES ((SSB_ENUM_LIMIT - SSB_ENUM_BASE) / SSB_CORE_SIZE)
55 #define SSB_GPIO_HWRAD 0x20 /* PCI config space GPIO 13 for hw radio disable */
108 #define SSB_TMSHIGH_SERR 0x00000001 /* S-error */
168 * in two-byte quantities.
189 #define SSB_SPROM1_IL0MAC 0x0048 /* 6 bytes MAC address for 802.11b/g */
202 #define SSB_SPROM1_BINF_ANTBG 0x3000 /* Available B-PHY and G-PHY antennas */
204 #define SSB_SPROM1_BINF_ANTA 0xC000 /* Available A-PHY antennas */
218 #define SSB_SPROM1_MAXPWR_BG 0x00FF /* B-PHY and G-PHY (in dBm Q5.2) */
219 #define SSB_SPROM1_MAXPWR_A 0xFF00 /* A-PHY (in dBm Q5.2) */
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/linux/drivers/net/wireless/admtek/
H A Dadm8211.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Linux device driver for ADMtek ADM8211 (IEEE 802.11b MAC/BBP)
7 * Copyright (c) 2004-2007, Michael Wu <flamingice@sourmilk.net>
11 * Much thanks to Infineon-ADMtek for their support of this driver.
30 MODULE_DESCRIPTION("Driver for IEEE 802.11b wireless cards based on ADMtek ADM8211");
76 struct adm8211_priv *priv = eeprom->data; in adm8211_eeprom_register_read()
79 eeprom->reg_data_in = reg & ADM8211_SPR_SDI; in adm8211_eeprom_register_read()
80 eeprom->reg_data_out = reg & ADM8211_SPR_SDO; in adm8211_eeprom_register_read()
81 eeprom->reg_data_clock = reg & ADM8211_SPR_SCLK; in adm8211_eeprom_register_read()
82 eeprom->reg_chip_select = reg & ADM8211_SPR_SCS; in adm8211_eeprom_register_read()
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/linux/drivers/phy/cadence/
H A Dphy-cadence-sierra.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
23 #include <dt-bindings/phy/phy.h>
24 #include <dt-bindings/phy/phy-cadence.h>
293 struct clk_hw hw; member
301 container_of(_hw, struct cdns_sierra_pll_mux, hw)
323 struct clk_hw hw; member
330 container_of(_hw, struct cdns_sierra_derived_refclk, hw)
417 u32 offset = reg << ctx->reg_offset_shift; in cdns_regmap_write()
419 writew(val, ctx->base + offset); in cdns_regmap_write()
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/linux/drivers/net/wireless/intel/iwlegacy/
H A D3945.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
8 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
16 #include <linux/dma-mapping.h>
94 * il3945_disable_events - Disable selected events in uCode event log
99 * Use for only special debugging. This function is just a placeholder as-is,
107 u32 disable_ptr; /* SRAM address of event-disable bitmap array */ in il3945_disable_events()
110 0x00000000, /* 31 - 0 Event id numbers */ in il3945_disable_events()
111 0x00000000, /* 63 - 32 */ in il3945_disable_events()
112 0x00000000, /* 95 - 64 */ in il3945_disable_events()
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/linux/drivers/net/wireless/marvell/mwifiex/
H A Dsta_cmdresp.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2011-2020 NXP
26 * command in case of Ad-hoc mode.
35 struct mwifiex_adapter *adapter = priv->adapter; in mwifiex_process_cmdresp_error()
40 resp->command, resp->result); in mwifiex_process_cmdresp_error()
42 if (adapter->curr_cmd->wait_q_enabled) in mwifiex_process_cmdresp_error()
43 adapter->cmd_wait_q.status = -1; in mwifiex_process_cmdresp_error()
45 switch (le16_to_cpu(resp->command)) { in mwifiex_process_cmdresp_error()
47 pm = &resp->params.psmode_enh; in mwifiex_process_cmdresp_error()
50 resp->result, le16_to_cpu(pm->action)); in mwifiex_process_cmdresp_error()
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/linux/drivers/net/wireless/ath/ath9k/
H A Dar9003_eeprom.c2 * Copyright (c) 2010-2011 Atheros Communications Inc.
19 #include "hw.h"
36 #define SUB_NUM_CTL_MODES_AT_5G_40 2 /* excluding HT40, EXT-OFDM */
37 #define SUB_NUM_CTL_MODES_AT_2G_40 3 /* excluding HT40, EXT-OFDM, EXT-CCK */
67 * bit0 - enable tx temp comp - disabled
68 * bit1 - enable tx volt comp - disabled
69 * bit2 - enable fastClock - enabled
70 * bit3 - enable doubling - enabled
71 * bit4 - enable internal regulator - disabled
72 * bit5 - enable pa predistortion - disabled
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/linux/drivers/net/wireless/broadcom/b43/
H A Dphy_n.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 Copyright (c) 2010-2011 Rafał Miłecki <zajec5@gmail.com>
96 enum nl80211_band band = b43_current_band(dev->wl); in b43_nphy_ipa()
97 return ((dev->phy.n->ipa2g_on && band == NL80211_BAND_2GHZ) || in b43_nphy_ipa()
98 (dev->phy.n->ipa5g_on && band == NL80211_BAND_5GHZ)); in b43_nphy_ipa()
101 /* https://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCoreGetState */
112 /* https://bcm-v4.sipsolutions.net/802.11/PHY/N/ForceRFSeq */
137 b43err(dev->wl, "RF sequence status timeout\n"); in b43_nphy_force_rf_sequence()
149 /* https://bcm-v4.sipsolutions.net/802.11/PHY/N/RFCtrlOverrideRev7 */
154 struct b43_phy *phy = &dev->phy; in b43_nphy_rf_ctl_override_rev7()
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