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/linux/Documentation/devicetree/bindings/sound/
H A Dti,tlv320adcx140.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Andrew Davis <afd@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - ti,tlv320adc3140
29 - ti,tlv320adc5140
30 - ti,tlv320adc6140
[all …]
H A Dcirrus,cs35l45.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
11 - Richard Fitzgerald <rf@opensource.cirrus.com>
18 - $ref: dai-common.yaml#
23 - cirrus,cs35l45
31 '#sound-dai-cells':
34 reset-gpios:
37 vdd-a-supply:
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/linux/drivers/gpio/
H A Dgpio-fxl6408.c1 // SPDX-License-Identifier: GPL-2.0-only
26 * the output high instead of low.
30 /* Bits here make the output High-Z, instead of the OUTPUT value. */
33 /* Returns the current status (1 = HIGH) of the input pins. */
38 * This bit is HIGH if input GPIO != default state (register 09h).
40 * The input must go back to default state and change again before this flag is raised again.
99 return dev_err_probe(dev, -ENODEV, "invalid device id 0x%02x\n", val); in fxl6408_identify()
106 struct device *dev = &client->dev; in fxl6408_probe()
126 /* Disable High-Z of outputs, so that our OUTPUT updates actually take effect. */ in fxl6408_probe()
129 return dev_err_probe(dev, ret, "failed to write 'output high Z' register\n"); in fxl6408_probe()
/linux/Documentation/ABI/testing/
H A Dsysfs-devices-platform-trackpoint4 Contact: linux-input@vger.kernel.org
11 Contact: linux-input@vger.kernel.org
13 (RW) Negative inertia factor. High values cause the cursor to
19 Contact: linux-input@vger.kernel.org
21 (RW) Backup range for z-axis press.
26 Contact: linux-input@vger.kernel.org
29 z-axis pressed.
34 Contact: linux-input@vger.kernel.org
41 Contact: linux-input@vger.kernel.org
48 Contact: linux-input@vger.kernel.org
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/linux/arch/arm/nwfpe/
H A Dsoftfloat.c4 This C source file is part of the SoftFloat IEC/IEEE Floating-point
10 National Science Foundation under grant MIP-9311980. The original version
11 of this code was written as part of a project to build a fixed-point vector
15 http://www.jhauser.us/arithmetic/SoftFloat-2b/SoftFloat-source.txt
38 -------------------------------------------------------------------------------
39 Primitive arithmetic functions, including multi-word arithmetic, and
42 -------------------------------------------------------------------------------
44 #include "softfloat-macros"
47 -------------------------------------------------------------------------------
52 are propagated from function inputs to output. These details are target-
[all …]
/linux/include/linux/input/
H A Dadxl34x.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/linux/input/adxl34x.h
15 #include <linux/input.h>
20 * X,Y,Z Axis Offset:
30 * TAP_X/Y/Z Enable: Setting TAP_X, Y, or Z Enable enables X,
31 * Y, or Z participation in Tap detection. A '0' excludes the
89 * X/Y/Z Enable: A '1' enables X, Y, or Z participation in activity
152 * result in the function appearing un-responsive if the
162 * holds the threshold value for Free-Fall detection.
163 * The data format is unsigned. The root-sum-square(RSS) value
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/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra194-p2888.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
27 stdout-path = "serial0:115200n8";
34 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 5) GPIO_ACTIVE_LOW>;
35 phy-handle = <&phy>;
36 phy-mode = "rgmii-id";
39 #address-cells = <1>;
40 #size-cells = <0>;
42 phy: ethernet-phy@0 {
43 compatible = "ethernet-phy-ieee802.3-c22";
[all …]
H A Dtegra210-p2597.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
23 avdd-dsi-csi-supply = <&vdd_dsi_csi>;
33 avdd-io-hdmi-dp-supply = <&avdd_1v05>;
34 vdd-hdmi-dp-pll-supply = <&vdd_1v8>;
35 hdmi-supply = <&vdd_hdmi>;
37 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
38 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(CC, 1)
[all …]
/linux/drivers/input/misc/
H A Dbma150.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 * http://www.bosch-sensortec.com/content/language1/downloads/BST-BMA150-DS000-07.pdf
16 #include <linux/input.h>
25 #define ABSMIN_ACC_VAL -(ABSMAX_ACC_VAL)
27 /* Each axis is represented by a 2-byte data word */
30 /* Input poll interval in milliseconds */
83 /* Any-motion interrupt register fields */
99 /* High-G interrupt register fields */
111 /* Low-G interrupt register fields */
125 struct input_dev *input; member
[all …]
/linux/Documentation/devicetree/bindings/hwmon/
H A Dadi,ltc4282.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices LTC4282 I2C High Current Hot Swap Controller over I2C
10 - Nuno Sa <nuno.sa@analog.com>
13 Analog Devices LTC4282 I2C High Current Hot Swap Controller over I2C.
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ltc4282.pdf
20 - adi,ltc4282
25 vdd-supply: true
30 '#clock-cells':
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/linux/arch/parisc/include/asm/
H A Dhash.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * HP-PA only implements integer multiply in the FPU. However, for
7 * integer multiplies by constant, it has a number of shift-and-add
8 * (but no shift-and-subtract, sigh!) instructions that a compiler
20 * PA7100 pairing rules. This is an in-order 2-way superscalar processor.
22 * but other than that, simple ALU ops (including shift-and-add by up
25 * PA8xxx processors also dual-issue ALU instructions, although with
28 * This 6-step sequence was found by Yevgen Voronenko's implementation
43 /* Phase 2: Return (b<<11) + (c<<6) + (a<<3) - c */ in __hash_32()
45 a += c << 3; b -= c; in __hash_32()
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/linux/arch/arm64/boot/dts/marvell/
H A Dcn9130-cf-base.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com>
9 /dts-v1/;
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
15 #include "cn9130-sr-som.dtsi"
16 #include "cn9130-cf.dtsi"
20 compatible = "solidrun,cn9130-clearfog-base",
21 "solidrun,cn9130-sr-som", "marvell,cn9130";
23 gpio-keys {
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/linux/Documentation/devicetree/bindings/iio/frequency/
H A Dadi,adf4377.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Antoniu Miclaus <antoniu.miclaus@analog.com>
11 - Dragos Bogdan <dragos.bogdan@analog.com>
14 The ADF4377 is a high performance, ultralow jitter, dual output integer-N
25 - adi,adf4377
26 - adi,adf4378
31 spi-max-frequency:
37 clock-names:
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/linux/drivers/comedi/drivers/
H A Damplc_dio200_pci.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright (C) 2005-2013 MEV Ltd. <https://www.mev.co.uk/>
8 * COMEDI - Linux Control and Measurement Device Interface
30 * ------------- ------------- -------------
32 * 0 PPI-X PPI-X PPI-X
33 * 1 PPI-Y UNUSED UNUSED
34 * 2 CTR-Z1 PPI-Y UNUSED
35 * 3 CTR-Z2 UNUSED UNUSED
36 * 4 INTERRUPT CTR-Z1 CTR-Z1
37 * 5 CTR-Z2 CTR-Z2
[all …]
H A Dpcmuio.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Comedi driver for Winsystems PC-104 based 48/96-channel DIO boards.
6 * COMEDI - Linux Control and Measurement Device Interface
12 * Description: Winsystems PC-104 based 48/96-channel DIO boards.
13 * Devices: [Winsystems] PCM-UIO48A (pcmuio48), PCM-UIO96A (pcmuio96)
15 * Updated: Fri, 13 Jan 2006 12:01:01 -0500
18 * A driver for the relatively straightforward-to-program PCM-UIO48A and
19 * PCM-UIO96A boards from Winsystems. These boards use either one or two
20 * (in the 96-DIO version) WS16C48 ASIC HighDensity I/O Chips (HDIO). This
22 * for INPUT or OUTPUT (thus comedi_dio_config can be done on a per-channel
[all …]
/linux/Documentation/devicetree/bindings/iio/proximity/
H A Dsemtech,sx9324.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gwendal Grignou <gwendal@chromium.org>
11 - Daniel Campello <campello@chromium.org>
17 - $ref: /schemas/iio/iio.yaml#
32 vdd-supply:
35 svdd-supply:
38 "#io-channel-cells":
41 semtech,ph0-pin:
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/linux/Documentation/devicetree/bindings/regulator/
H A Dfixed-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/fixed-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Girdwood <lgirdwood@gmail.com>
11 - Mark Brown <broonie@kernel.org>
16 expected to have the regulator-min-microvolt and regulator-max-microvolt
20 - $ref: regulator.yaml#
21 - if:
25 const: regulator-fixed-clock
[all …]
/linux/tools/testing/selftests/gpio/
H A Dgpio-mockup.sh1 #!/bin/bash -efu
2 # SPDX-License-Identifier: GPL-2.0
7 #4: skip test - including run as non-root user
13 module="gpio-mockup"
29 echo "$0 [-frv] [-t type]"
30 echo "-f: full test (minimal set run by default)"
31 echo "-r: test random lines as well as fence posts"
32 echo "-t: interface type:"
33 echo " cdev (character device ABI) - default"
36 echo "-v: verbose progress reporting"
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dst,stm32-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre TORGUE <alexandre.torgue@foss.st.com>
15 controller. It controls the input/output settings on the available pins and
17 on-chip controllers onto these pads.
22 - st,stm32f429-pinctrl
23 - st,stm32f469-pinctrl
24 - st,stm32f746-pinctrl
[all …]
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
16 nvidia,hpd-gpio =
18 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
19 vdd-supply = <&reg_3v3_avdd_hdmi>;
24 lan-reset-n-hog {
25 gpio-hog;
27 output-high;
28 line-name = "LAN_RESET#";
33 pinctrl-names = "default";
[all …]
H A Dtegra30-apalis-v1.1.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
16 avdd-pexa-supply = <&vdd2_reg>;
17 avdd-pexb-supply = <&vdd2_reg>;
18 avdd-pex-pll-supply = <&vdd2_reg>;
19 avdd-plle-supply = <&ldo6_reg>;
20 hvdd-pex-supply = <&reg_module_3v3>;
21 vddio-pex-ctl-supply = <&reg_module_3v3>;
22 vdd-pexa-supply = <&vdd2_reg>;
23 vdd-pexb-supply = <&vdd2_reg>;
27 nvidia,num-lanes = <4>;
[all …]
H A Dtegra30-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 avdd-pexa-supply = <&vdd2_reg>;
16 avdd-pexb-supply = <&vdd2_reg>;
17 avdd-pex-pll-supply = <&vdd2_reg>;
18 avdd-plle-supply = <&ldo6_reg>;
19 hvdd-pex-supply = <&reg_module_3v3>;
20 vddio-pex-ctl-supply = <&reg_module_3v3>;
21 vdd-pexa-supply = <&vdd2_reg>;
22 vdd-pexb-supply = <&vdd2_reg>;
26 nvidia,num-lanes = <4>;
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dsilabs,si5351.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 8 outputs. Si5351A also has a reduced pin-count package (10-MSOP) where only 3
16 https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/Si5351-B.pdf
19 - Alvin Šipraga <alsi@bang-olufsen.dk>
24 - silabs,si5351a # Si5351A, 20-QFN package
25 - silabs,si5351a-msop # Si5351A, 10-MSOP package
26 - silabs,si5351b # Si5351B, 20-QFN package
27 - silabs,si5351c # Si5351C, 20-QFN package
[all …]
/linux/arch/m68k/ifpsp060/src/
H A Dfplsp.S3 M68000 Hi-Performance Microprocessor Division
5 Production Release P1.00 -- October 10, 1994
276 set LV, -LOCAL_SIZE # stack offset
285 set EXC_AREGS, -68 # offset of all address regs
286 set EXC_DREGS, -100 # offset of all data regs
287 set EXC_FPREGS, -36 # offset of all fp regs
472 set nzi_mask, 0x01ffffff #clears N, Z, and I
503 set rn_mode, 0x0 # round-to-nearest
504 set rz_mode, 0x1 # round-to-zero
505 set rm_mode, 0x2 # round-tp-minus-infinity
[all …]
/linux/drivers/gpu/drm/vc4/
H A Dvc4_qpu_defines.h66 QPU_R_FRAG_PAYLOAD_ZW = 15, /* W for A file, Z for B file */
67 /* 0-31 are the plain regfile a or b fields */
81 /* 0-31 are the plain regfile a or b fields */
147 /* non-hardware mux values */
164 /* replicated to each 8 bits of the 32-bit dst. */
174 /* convert to 16 bit float if float input, or to int16. */
177 /* replicated to each 8 bits of the 32-bit dst. */
179 /* Convert to 8-bit unsigned int. */
186 QPU_PACK_A_32_SAT, /* int-only */
207 #define QPU_MASK(high, low) \ argument
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