Searched +full:has +full:- +full:lpm +full:- +full:erratum (Results 1 – 15 of 15) sorted by relevance
/linux/Documentation/devicetree/bindings/usb/ |
H A D | snps,dwc3-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/usb/snps,dwc3-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Felipe Balbi <balbi@kernel.org> 14 vendor-specific implementation or as a standalone component. 17 - $ref: usb-drd.yaml# 18 - if: 24 - dr_mode 28 $ref: usb-xhci.yaml# [all …]
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/linux/drivers/usb/dwc3/ |
H A D | dwc3-haps.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * dwc3-haps.c - Synopsys HAPS PCI Specific glue layer 19 * struct dwc3_haps - Driver private structure 30 PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"), 44 struct device *dev = &pci->dev; in dwc3_haps_probe() 51 return -ENODEV; in dwc3_haps_probe() 58 return -ENOMEM; in dwc3_haps_probe() 60 dwc->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO); in dwc3_haps_probe() 61 if (!dwc->dwc3) in dwc3_haps_probe() 62 return -ENOMEM; in dwc3_haps_probe() [all …]
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H A D | core.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * core.h - DesignWare USB3 DRD Core Header 5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com 20 #include <linux/dma-mapping.h> 37 * DWC3 Multiport controllers support up to 15 High-Speed PHYs 197 /* Global SoC Bus Configuration Register: AHB-prot/AXI-cache/OCP-ReqInfo */ 684 * struct dwc3_event_buffer - Software event buffer representation 718 * struct dwc3_ep - device side endpoint representation 732 * @number: endpoint number (1 - 15) 737 * @name: a human readable name e.g. ep1out-bulk [all …]
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H A D | core.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * core.c - DesignWare USB3 DRD Controller Core file 5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com 24 #include <linux/dma-mapping.h> 44 #include "../host/xhci-ext-caps.h" 49 * dwc3_get_dr_mode - Validates and sets dr_mode 55 struct device *dev = dwc->dev; in dwc3_get_dr_mode() 58 if (dwc->dr_mode == USB_DR_MODE_UNKNOWN) in dwc3_get_dr_mode() 59 dwc->dr_mode = USB_DR_MODE_OTG; in dwc3_get_dr_mode() 61 mode = dwc->dr_mode; in dwc3_get_dr_mode() [all …]
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H A D | gadget.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * gadget.c - DesignWare USB3 DRD Controller Gadget Framework Link 5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com 20 #include <linux/dma-mapping.h> 30 #define DWC3_ALIGN_FRAME(d, n) (((d)->frame_number + ((d)->interval * (n))) \ 31 & ~((d)->interval - 1)) 34 * dwc3_gadget_set_test_mode - enables usb2 test modes 39 * success or -EINVAL if wrong Test Selector is passed. 45 reg = dwc3_readl(dwc->regs, DWC3_DCTL); in dwc3_gadget_set_test_mode() 57 return -EINVAL; in dwc3_gadget_set_test_mode() [all …]
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/linux/arch/arm64/boot/dts/exynos/ |
H A D | exynos2200.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 8 #include <dt-bindings/clock/samsung,exynos2200-cmu.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 16 interrupt-parent = <&gic>; 30 xtcxo: clock-1 { 31 compatible = "fixed-clock"; 32 #clock-cells = <0>; 33 clock-output-names = "oscclk"; [all …]
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | qcs615.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,qcs615-gcc.h> 7 #include <dt-bindings/clock/qcom,rpmh.h> 8 #include <dt-bindings/dma/qcom-gpi.h> 9 #include <dt-bindings/interconnect/qcom,icc.h> 10 #include <dt-bindings/interconnect/qcom,qcs615-rpmh.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/power/qcom-rpmpd.h> 13 #include <dt-bindings/power/qcom,rpmhpd.h> 14 #include <dt-bindings/soc/qcom,rpmh-rsc.h> [all …]
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H A D | qcm2290.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 8 #include <dt-bindings/clock/qcom,dispcc-qcm2290.h> 9 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 10 #include <dt-bindings/clock/qcom,gcc-qcm2290.h> 11 #include <dt-bindings/clock/qcom,qcm2290-gpucc.h> 12 #include <dt-bindings/clock/qcom,rpmcc.h> 13 #include <dt-bindings/dma/qcom-gpi.h> 14 #include <dt-bindings/firmware/qcom,scm.h> 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/interrupt-controller/arm-gic.h> [all …]
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H A D | msm8998.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 6 #include <dt-bindings/clock/qcom,gcc-msm8998.h> 7 #include <dt-bindings/clock/qcom,gpucc-msm8998.h> 8 #include <dt-bindings/clock/qcom,mmcc-msm8998.h> 9 #include <dt-bindings/clock/qcom,rpmcc.h> 10 #include <dt-bindings/firmware/qcom,scm.h> 11 #include <dt-bindings/power/qcom-rpmpd.h> 12 #include <dt-bindings/gpio/gpio.h> [all …]
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H A D | sm6350.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 7 #include <dt-bindings/clock/qcom,dispcc-sm6350.h> 8 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 9 #include <dt-bindings/clock/qcom,gcc-sm6350.h> 10 #include <dt-bindings/clock/qcom,gpucc-sm6350.h> 11 #include <dt-bindings/clock/qcom,rpmh.h> 12 #include <dt-bindings/clock/qcom,sm6350-camcc.h> 13 #include <dt-bindings/dma/qcom-gpi.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/interconnect/qcom,icc.h> [all …]
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H A D | sm6115.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 7 #include <dt-bindings/clock/qcom,gcc-sm6115.h> 8 #include <dt-bindings/clock/qcom,sm6115-dispcc.h> 9 #include <dt-bindings/clock/qcom,sm6115-gpucc.h> 10 #include <dt-bindings/clock/qcom,rpmcc.h> 11 #include <dt-bindings/dma/qcom-gpi.h> 12 #include <dt-bindings/firmware/qcom,scm.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/interconnect/qcom,rpm-icc.h> [all …]
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H A D | sm8550.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 7 #include <dt-bindings/clock/qcom,rpmh.h> 8 #include <dt-bindings/clock/qcom,sm8450-videocc.h> 9 #include <dt-bindings/clock/qcom,sm8550-camcc.h> 10 #include <dt-bindings/clock/qcom,sm8550-gcc.h> 11 #include <dt-bindings/clock/qcom,sm8550-gpucc.h> 12 #include <dt-bindings/clock/qcom,sm8550-tcsr.h> 13 #include <dt-bindings/clock/qcom,sm8550-dispcc.h> 14 #include <dt-bindings/dma/qcom-gpi.h> [all …]
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H A D | sar2130p.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,rpmh.h> 7 #include <dt-bindings/clock/qcom,sar2130p-gcc.h> 8 #include <dt-bindings/clock/qcom,sar2130p-gpucc.h> 9 #include <dt-bindings/clock/qcom,sm8550-dispcc.h> 10 #include <dt-bindings/clock/qcom,sm8550-tcsr.h> 11 #include <dt-bindings/dma/qcom-gpi.h> 12 #include <dt-bindings/interconnect/qcom,icc.h> 13 #include <dt-bindings/interconnect/qcom,sar2130p-rpmh.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> [all …]
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H A D | sm8650.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 7 #include <dt-bindings/clock/qcom,rpmh.h> 8 #include <dt-bindings/clock/qcom,sm8650-camcc.h> 9 #include <dt-bindings/clock/qcom,sm8650-dispcc.h> 10 #include <dt-bindings/clock/qcom,sm8650-gcc.h> 11 #include <dt-bindings/clock/qcom,sm8650-gpucc.h> 12 #include <dt-bindings/clock/qcom,sm8650-tcsr.h> 13 #include <dt-bindings/clock/qcom,sm8650-videocc.h> 14 #include <dt-bindings/dma/qcom-gpi.h> [all …]
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/linux/arch/arm64/boot/dts/exynos/google/ |
H A D | gs101.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright 2019-2023 Google LLC 6 * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org> 9 #include <dt-bindings/clock/google,gs101.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/soc/samsung,exynos-usi.h> 16 #address-cells = <2>; 17 #size-cells = <1>; 19 interrupt-parent = <&gic>; [all …]
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