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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dqcom,gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,gpucc.yaml#
17 include/dt-bindings/clock/qcom,gpucc-sdm845.h
18 include/dt-bindings/clock/qcom,gpucc-sa8775p.h
19 include/dt-bindings/clock/qcom,gpucc-sc7180.h
20 include/dt-bindings/clock/qcom,gpucc-sc7280.h
21 include/dt-bindings/clock/qcom,gpucc-sc8280xp.h
22 include/dt-bindings/clock/qcom,gpucc-sm6350.h
23 include/dt-bindings/clock/qcom,gpucc-sm8150.h
24 include/dt-bindings/clock/qcom,gpucc-sm8250.h
25 include/dt-bindings/clock/qcom,gpucc-sm8350.h
[all …]
H A Dqcom,sm8450-gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-gpucc.yaml#
17 include/dt-bindings/clock/qcom,sm4450-gpucc.h
18 include/dt-bindings/clock/qcom,sm8450-gpucc.h
19 include/dt-bindings/clock/qcom,sm8550-gpucc.h
20 include/dt-bindings/reset/qcom,sm8450-gpucc.h
21 include/dt-bindings/reset/qcom,sm8650-gpucc.h
22 include/dt-bindings/reset/qcom,x1e80100-gpucc.h
27 - qcom,sm4450-gpucc
28 - qcom,sm8450-gpucc
29 - qcom,sm8550-gpucc
[all …]
H A Dqcom,gpucc-sdm660.yaml4 $id: http://devicetree.org/schemas/clock/qcom,gpucc-sdm660.yaml#
16 See also dt-bindings/clock/qcom,gpucc-sdm660.h.
21 - qcom,gpucc-sdm630
22 - qcom,gpucc-sdm660
53 compatible = "qcom,gpucc-sdm660";
H A Dqcom,msm8998-gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,msm8998-gpucc.yaml#
16 See also:: include/dt-bindings/clock/qcom,gpucc-msm8998.h
20 const: qcom,msm8998-gpucc
48 compatible = "qcom,msm8998-gpucc";
H A Dqcom,sm6115-gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sm6115-gpucc.yaml#
16 See also:: include/dt-bindings/clock/qcom,sm6115-gpucc.h
21 - qcom,sm6115-gpucc
48 compatible = "qcom,sm6115-gpucc";
H A Dqcom,sm6125-gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sm6125-gpucc.yaml#
16 See also:: include/dt-bindings/clock/qcom,sm6125-gpucc.h
21 - qcom,sm6125-gpucc
56 compatible = "qcom,sm6125-gpucc";
H A Dqcom,sc7180-gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sc7180-gpucc.yaml#
16 See also dt-bindings/clock/qcom,gpucc-sc7180.h.
20 const: qcom,sc7180-gpucc
62 compatible = "qcom,sc7180-gpucc";
H A Dqcom,sdm845-gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sdm845-gpucc.yaml#
16 See also dt-bindings/clock/qcom,gpucc-sdm845.h.
20 const: qcom,sdm845-gpucc
62 compatible = "qcom,sdm845-gpucc";
H A Dqcom,gpucc-sm8350.yaml4 $id: http://devicetree.org/schemas/clock/qcom,gpucc-sm8350.yaml#
16 See also:: include/dt-bindings/clock/qcom,gpucc-sm8350.h
21 - qcom,sm8350-gpucc
61 compatible = "qcom,sm8350-gpucc";
H A Dqcom,sm6375-gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sm6375-gpucc.yaml#
16 See also:: include/dt-bindings/clock/qcom,sm6375-gpucc.h
21 - qcom,sm6375-gpucc
62 compatible = "qcom,sm6375-gpucc";
H A Dqcom,qcm2290-gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,qcm2290-gpucc.yaml#
17 include/dt-bindings/clock/qcom,qcm2290-gpucc.h
21 const: qcom,qcm2290-gpucc
64 compatible = "qcom,qcm2290-gpucc";
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Dgmu.yaml290 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
303 clocks = <&gpucc GPU_CC_CX_GMU_CLK>,
304 <&gpucc GPU_CC_CXO_CLK>,
313 power-domains = <&gpucc GPU_CX_GDSC>,
314 <&gpucc GPU_GX_GDSC>;
325 power-domains = <&gpucc GPU_CX_GDSC>,
326 <&gpucc GPU_GX_GDSC>;
H A Dgpu.yaml209 description: GPUCC clocksource clock
293 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dqcom-soc.yaml47 - qcom,gpucc-sdm630
48 - qcom,gpucc-sdm660
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdm660.dtsi140 &gpucc {
141 compatible = "qcom,gpucc-sdm660";
H A Dqcm2290.dtsi10 #include <dt-bindings/clock/qcom,qcm2290-gpucc.h>
1441 clocks = <&gpucc GPU_CC_GX_GFX3D_CLK>,
1442 <&gpucc GPU_CC_AHB_CLK>,
1445 <&gpucc GPU_CC_CX_GMU_CLK>,
1446 <&gpucc GPU_CC_CXO_CLK>;
1535 power-domains = <&gpucc GPU_CX_GDSC>,
1536 <&gpucc GPU_GX_GDSC>;
1541 gpucc: clock-controller@5990000 { label
1542 compatible = "qcom,qcm2290-gpucc";
1570 <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>,
[all …]
H A Dsm6115.dtsi8 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
1695 clocks = <&gpucc GPU_CC_GX_GFX3D_CLK>,
1696 <&gpucc GPU_CC_AHB_CLK>,
1699 <&gpucc GPU_CC_CX_GMU_CLK>,
1700 <&gpucc GPU_CC_CXO_CLK>;
1783 power-domains = <&gpucc GPU_CX_GDSC>,
1784 <&gpucc GPU_GX_GDSC>;
1788 gpucc: clock-controller@5990000 { label
1789 compatible = "qcom,sm6115-gpucc";
1814 <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>,
[all …]
H A Dsm8350.dtsi10 #include <dt-bindings/clock/qcom,gpucc-sm8350.h>
1986 clocks = <&gpucc GPU_CC_CX_GMU_CLK>,
1987 <&gpucc GPU_CC_CXO_CLK>,
1990 <&gpucc GPU_CC_AHB_CLK>,
1991 <&gpucc GPU_CC_HUB_CX_INT_CLK>,
1992 <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>;
2001 power-domains = <&gpucc GPU_CX_GDSC>,
2002 <&gpucc GPU_GX_GDSC>;
2020 gpucc: clock-controller@3d90000 { label
2021 compatible = "qcom,sm8350-gpucc";
[all …]
H A Dsm4450.dtsi10 #include <dt-bindings/clock/qcom,sm4450-gpucc.h>
428 gpucc: clock-controller@3d90000 { label
429 compatible = "qcom,sm4450-gpucc";
H A Dsm6350.dtsi9 #include <dt-bindings/clock/qcom,gpucc-sm6350.h>
1436 clocks = <&gpucc GPU_CC_AHB_CLK>,
1443 power-domains = <&gpucc GPU_CX_GDSC>;
1460 clocks = <&gpucc GPU_CC_AHB_CLK>,
1461 <&gpucc GPU_CC_CX_GMU_CLK>,
1462 <&gpucc GPU_CC_CXO_CLK>,
1471 power-domains = <&gpucc GPU_CX_GDSC>,
1472 <&gpucc GPU_GX_GDSC>;
1490 gpucc: clock-controller@3d90000 { label
1491 compatible = "qcom,sm6350-gpucc";
H A Dsm8450.dtsi11 #include <dt-bindings/clock/qcom,sm8450-gpucc.h>
22 #include <dt-bindings/reset/qcom,sm8450-gpucc.h>
2264 clocks = <&gpucc GPU_CC_AHB_CLK>,
2265 <&gpucc GPU_CC_CX_GMU_CLK>,
2266 <&gpucc GPU_CC_CXO_CLK>,
2269 <&gpucc GPU_CC_HUB_CX_INT_CLK>,
2270 <&gpucc GPU_CC_DEMET_CLK>;
2279 power-domains = <&gpucc GPU_CX_GDSC>,
2280 <&gpucc GPU_GX_GDSC>;
2305 gpucc: clock-controller@3d90000 { label
[all …]
H A Dsdm630.dtsi8 #include <dt-bindings/clock/qcom,gpucc-sdm660.h>
1081 <&gpucc GPUCC_RBBMTIMER_CLK>,
1084 <&gpucc GPUCC_RBCPR_CLK>,
1085 <&gpucc GPUCC_GFX3D_CLK>;
1167 power-domains = <&gpucc GPU_GX_GDSC>;
1193 gpucc: clock-controller@5065000 { label
1194 compatible = "qcom,gpucc-sdm630";
H A Dsc7280.dtsi10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h>
2908 clocks = <&gpucc GPU_CC_CX_GMU_CLK>,
2909 <&gpucc GPU_CC_CXO_CLK>,
2912 <&gpucc GPU_CC_AHB_CLK>,
2913 <&gpucc GPU_CC_HUB_CX_INT_CLK>,
2914 <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>;
2922 power-domains = <&gpucc GPU_CC_CX_GDSC>,
2923 <&gpucc GPU_CC_GX_GDSC>;
2939 gpucc: clock-controller@3d90000 { label
2940 compatible = "qcom,sc7280-gpucc";
[all …]
H A Dsc8280xp.dtsi9 #include <dt-bindings/clock/qcom,gpucc-sc8280xp.h>
2521 clocks = <&gpucc GPU_CC_CX_GMU_CLK>,
2522 <&gpucc GPU_CC_CXO_CLK>,
2525 <&gpucc GPU_CC_AHB_CLK>,
2526 <&gpucc GPU_CC_HUB_CX_INT_CLK>,
2527 <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>;
2535 power-domains = <&gpucc GPU_CC_CX_GDSC>,
2536 <&gpucc GPU_CC_GX_GDSC>;
2557 gpucc: clock-controller@3d90000 { label
2558 compatible = "qcom,sc8280xp-gpucc";
[all …]
H A Dsm8650.dtsi10 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
23 #include <dt-bindings/reset/qcom,sm8650-gpucc.h>
2717 clocks = <&gpucc GPU_CC_AHB_CLK>,
2718 <&gpucc GPU_CC_CX_GMU_CLK>,
2719 <&gpucc GPU_CC_CXO_CLK>,
2722 <&gpucc GPU_CC_HUB_CX_INT_CLK>,
2723 <&gpucc GPU_CC_DEMET_CLK>;
2732 power-domains = <&gpucc GPU_CX_GDSC>,
2733 <&gpucc GPU_GX_GDSC>;
2758 gpucc: clock-controller@3d90000 { label
[all …]

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