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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dqcom,pmic-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC GPIO block
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 This binding describes the GPIO block(s) found in the 8xxx series of
19 - enum:
20 - qcom,pm2250-gpio
21 - qcom,pm660-gpio
[all …]
H A Dqcom,tlmm-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,tlmm-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
23 interrupt-controller: true
25 '#interrupt-cells':
28 include/dt-bindings/interrupt-controller/irq.h
31 gpio-controller: true
33 '#gpio-cells':
[all …]
H A Dcypress,cy8c95x0.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cypress CY8C95X0 I2C GPIO expander
10 - Patrick Rudolph <patrick.rudolph@9elements.com>
13 This supports the 20/40/60 pin Cypress CYC95x0 GPIO I2C expanders.
14 Pin function configuration is performed on a per-pin basis.
19 - cypress,cy8c9520
20 - cypress,cy8c9540
21 - cypress,cy8c9560
[all …]
H A Dqcom,msm8998-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8998-pinctr
[all...]
H A Dqcom,sc7180-pinctrl.txt6 - compatible:
9 Definition: must be "qcom,sc7180-pinctrl"
11 - reg:
13 Value type: <prop-encoded-array>
17 - reg-names:
19 Value type: <prop-encoded-array>
23 - interrupts:
25 Value type: <prop-encoded-array>
28 - interrupt-controller:
33 - #interrupt-cells:
[all …]
H A Dqcom,sm8150-pinctrl.txt6 - compatible:
9 Definition: must be "qcom,sm8150-pinctrl"
11 - reg:
13 Value type: <prop-encoded-array>
17 - reg-names:
19 Value type: <prop-encoded-array>
23 - interrupts:
25 Value type: <prop-encoded-array>
28 - interrupt-controller:
33 - #interrupt-cells:
[all …]
H A Dqcom,msm8998-pinctrl.txt6 - compatible:
9 Definition: must be "qcom,msm8998-pinctrl"
11 - reg:
13 Value type: <prop-encoded-array>
16 - interrupts:
18 Value type: <prop-encoded-array>
21 - interrupt-controller:
26 - #interrupt-cells:
30 in <dt-bindings/interrupt-controller/irq.h>
32 - gpio-controller:
[all …]
H A Dqcom,msm8226-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8226-pinctr
[all...]
H A Dqcom,lpass-lpi-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,lpass-lpi-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
19 const: qcom,sm8250-lpass-lpi-pinctrl
27 - description: LPASS Core voting clock
28 - description: LPASS Audio voting clock
30 clock-names:
32 - const: core
[all …]
H A Dqcom,ipq8064-pinctrl.txt4 - compatible: "qcom,ipq8064-pinctrl"
5 - reg: Should be the base address and length of the TLMM block.
6 - interrupts: Should be the parent IRQ of the TLMM block.
7 - interrupt-controller: Marks the device node as an interrupt controller.
8 - #interrupt-cells: Should be two.
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells : Should be two.
11 The first cell is the gpio pin number and the
13 - gpio-ranges: see ../gpio/gpio.txt
17 - gpio-reserved-ranges: see ../gpio/gpio.txt
[all …]
H A Dqcom,msm8660-pinctrl.txt4 - compatible: "qcom,msm8660-pinctrl"
5 - reg: Should be the base address and length of the TLMM block.
6 - interrupts: Should be the parent IRQ of the TLMM block.
7 - interrupt-controller: Marks the device node as an interrupt controller.
8 - #interrupt-cells: Should be two.
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells : Should be two.
11 The first cell is the gpio pin number and the
13 - gpio-ranges: see ../gpio/gpio.txt
17 - gpio-reserved-ranges: see ../gpio/gpio.txt
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/st/
H A Dstm32mp25xxai-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
10 gpioa: gpio@44240000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@44250000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@44260000 {
25 gpio-ranges = <&pinctrl 0 32 14>;
28 gpiod: gpio@44270000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
H A Dstm32mp25xxak-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
10 gpioa: gpio@44240000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@44250000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@44260000 {
25 gpio-ranges = <&pinctrl 0 32 14>;
28 gpiod: gpio@44270000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
H A Dstm32mp25xxal-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
10 gpioa: gpio@44240000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@44250000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@44260000 {
25 gpio-ranges = <&pinctrl 0 32 14>;
28 gpiod: gpio@44270000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstm32mp15xxaa-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
H A Dstm32mp15xxac-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
H A Dstm32mp15xxad-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
H A Dstm32mp15xxab-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dadi,adp5585.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
19 - enum:
20 - adi,adp5585-00 # Default
21 - adi,adp5585-01 # 11 GPIOs
22 - adi,adp5585-02 # No pull-up resistors by default on special pins
23 - adi,adp5585-03 # Alternate I2C address
24 - adi,adp5585-04 # Pull-down resistors on all pins by default
[all …]
/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dgpio.txt1 Specifying GPIO information for devices
5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
14 GPIO properties can contain one or more GPIO phandles, but only in exceptional
23 The following example could be used to describe GPIO pins used as device enable
24 and bit-banged data signals:
27 gpio-controller;
28 #gpio-cells = <2>;
[all …]
H A Drenesas,rcar-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/renesas,rcar-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car General-Purpose Input/Output Ports (GPIO)
10 - Geert Uytterhoeven <geert+renesas@glider.be>
15 - items:
16 - enum:
17 - renesas,gpio-r8a7778 # R-Car M1
18 - renesas,gpio-r8a7779 # R-Car H1
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dpm8450a.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/spmi/spmi.h>
11 compatible = "qcom,pm8150", "qcom,spmi-pmic";
13 #address-cells = <1>;
14 #size-cells = <0>;
16 pm8450a_gpios: gpio@c000 {
17 compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
19 gpio-controller;
20 gpio-ranges = <&pm8450a_gpios 0 0 10>;
[all …]
H A Dsa8540p-pmics.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/spmi/spmi.h>
12 compatible = "qcom,pm8150", "qcom,spmi-pmic";
14 #address-cell
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am62p-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "ti,am62-usb";
14 clock-names = "ref";
15 ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
16 #address-cells = <2>;
17 #size-cells = <2>;
18 power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
19 ranges;
27 interrupt-names = "host", "peripheral";
[all …]
/freebsd/sys/contrib/device-tree/src/mips/pic32/
H A Dpic32mzda.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015 Microchip Technology Inc. All rights reserved.
5 #include <dt-bindings/clock/microchip,pic32-clock.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&evic>;
33 #address-cells = <1>;
34 #size-cells = <0>;
43 compatible = "microchip,pic32mzda-infra";
[all …]

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