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/linux/Documentation/devicetree/bindings/net/
H A Dmarvell,pp2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/marvell,pp2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marcin Wojtas <mw@semihalf.com>
11 - Russell King <linux@armlinux.org>
21 - marvell,armada-375-pp2
22 - marvell,armada-7k-pp22
28 "#address-cells":
31 "#size-cells":
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/linux/drivers/media/common/
H A Dcx2341x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * cx2341x - generic code for cx23415/6/8 based devices
17 #include <media/drv-intf/cx2341x.h>
18 #include <media/v4l2-common.h>
26 MODULE_PARM_DESC(debug, "Debug level (0-1)");
30 /* definitions for audio properties bits 29-28 */
35 static const char *cx2341x_get_name(u32 id) in cx2341x_get_name() argument
37 switch (id) { in cx2341x_get_name()
66 static const char **cx2341x_get_menu(u32 id) in cx2341x_get_menu() argument
79 "2D Symmetric non-separable", in cx2341x_get_menu()
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/linux/arch/arm64/boot/dts/marvell/
H A Darmada-cp11x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/interrupt-controller/mvebu-icu.h>
9 #include <dt-bindings/thermal/thermal.h>
11 #include "armada-common.dtsi"
27 thermal-zones {
28 CP11X_LABEL(thermal_ic): CP11X_NODE_NAME(ic-thermal) {
29 polling-delay-passive = <0>; /* Interrupt driven */
30 polling-delay = <0>; /* Interrupt driven */
32 thermal-sensors = <&CP11X_LABEL(thermal) 0>;
42 cooling-maps { };
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/linux/include/media/drv-intf/
H A Dcx2341x.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
10 #include <media/v4l2-ctrls.h>
27 enum cx2341x_port port; member
86 const char * const *cx2341x_ctrl_get_menu(const struct cx2341x_mpeg_params *p, u32 id);
107 enum cx2341x_port port; member
133 /* video gop cluster */
188 #define CX2341X_FIRM_ENC_FILENAME "v4l-cx2341x-enc.fw"
190 #define CX2341X_FIRM_DEC_FILENAME "v4l-cx2341x-dec.fw"
/linux/Documentation/driver-api/media/drivers/
H A Dcx2341x-devel.rst1 .. SPDX-License-Identifier: GPL-2.0
7 -----------------------
12 .. note:: the memory long words are little-endian ('intel format').
21 .. code-block:: none
23 ivtvctl -O min=0x02000000,max=0x020000ff
26 register space :-).
35 .. code-block:: none
37 0x00000000-0x00ffffff Encoder memory space
38 0x00000000-0x0003ffff Encode.rom
39 ???-??? MPEG buffer(s)
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/linux/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2_main.c1 // SPDX-License-Identifier: GPL-2.0
61 static void mvpp2_acpi_start(struct mvpp2_port *port);
76 writel(data, priv->swth_base[0] + offset); in mvpp2_write()
81 return readl(priv->swth_base[0] + offset); in mvpp2_read()
86 return readl_relaxed(priv->swth_base[0] + offset); in mvpp2_read_relaxed()
91 return cpu % priv->nthreads; in mvpp2_cpu_to_thread()
96 writel(data, priv->cm3_base + offset); in mvpp2_cm3_write()
101 return readl(priv->cm3_base + offset); in mvpp2_cm3_read()
124 * - per-thread registers, where each thread has its own copy of the
140 * - global registers that must be accessed through a specific thread
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H A Dmvpp2.h1 /* SPDX-License-Identifier: GPL-2.0 */
34 #define MVPP2_RX_DATA_FIFO_SIZE_REG(port) (0x00 + 4 * (port)) argument
35 #define MVPP2_RX_ATTR_FIFO_SIZE_REG(port) (0x20 + 4 * (port)) argument
38 #define MVPP22_TX_FIFO_THRESH_REG(port) (0x8840 + 4 * (port)) argument
39 #define MVPP22_TX_FIFO_SIZE_REG(port) (0x8860 + 4 * (port)) argument
42 #define MVPP2_RX_CTRL_REG(port) (0x140 + 4 * (port)) argument
61 #define MVPP2_MH_REG(port) (0x5040 + 4 * (port)) argument
70 #define MVPP2_PRS_PORT_LU_MASK(port) (0xff << ((port) * 4)) argument
71 #define MVPP2_PRS_PORT_LU_VAL(port, val) ((val) << ((port) * 4)) argument
72 #define MVPP2_PRS_INIT_OFFS_REG(port) (0x1004 + ((port) & 4)) argument
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/linux/drivers/gpu/drm/i915/display/
H A Dvlv_dsi.c89 void vlv_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum port port) in vlv_dsi_wait_for_fifo_empty() argument
91 struct intel_display *display = to_intel_display(&intel_dsi->base); in vlv_dsi_wait_for_fifo_empty()
97 if (intel_de_wait_for_set(display, MIPI_GEN_FIFO_STAT(display, port), in vlv_dsi_wait_for_fifo_empty()
99 drm_err(display->drm, "DPI FIFOs are not empty\n"); in vlv_dsi_wait_for_fifo_empty()
111 for (j = 0; j < min_t(u32, len - i, 4); j++) in write_data()
127 for (j = 0; j < min_t(u32, len - i, 4); j++) in read_data()
136 struct intel_dsi *intel_dsi = intel_dsi_host->intel_dsi; in intel_dsi_host_transfer()
137 struct intel_display *display = to_intel_display(&intel_dsi->base); in intel_dsi_host_transfer()
138 enum port port = intel_dsi_host->port; in intel_dsi_host_transfer() local
151 if (msg->flags & MIPI_DSI_MSG_USE_LPM) { in intel_dsi_host_transfer()
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