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/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone-k2e-netcp.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/
9 compatible = "ti,keystone-navigator-qmss";
10 dma-coherent;
11 #address-cells = <1>;
12 #size-cells = <1>;
15 queue-range = <0 0x2000>;
20 #address-cells = <1>;
21 #size-cells = <1>;
24 managed-queues = <0 0x2000>;
[all …]
H A Dkeystone-k2l-netcp.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/
9 compatible = "ti,keystone-navigator-qmss";
10 dma-coherent;
11 #address-cells = <1>;
12 #size-cells = <1>;
15 queue-range = <0 0x2000>;
20 #address-cells = <1>;
21 #size-cells = <1>;
24 managed-queues = <0 0x2000>;
[all …]
H A Dkeystone-k2hk-netcp.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/
9 compatible = "ti,keystone-navigator-qmss";
10 dma-coherent;
11 #address-cells = <1>;
12 #size-cells = <1>;
15 queue-range = <0 0x4000>;
20 #address-cells = <1>;
21 #size-cells = <1>;
24 managed-queues = <0 0x2000>;
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7988a-bananapi-bpi-r4.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/regulator/richtek,rt5190a-regulator.h>
13 stdout-path = "serial0:115200n8";
16 fan: pwm-fan {
17 compatible = "pwm-fan";
18 /* cooling level (0, 1, 2, 3) : (0% duty, 30% duty, 50% duty, 100% duty) */
19 cooling-levels = <0 80 128 255>;
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/linux/drivers/phy/marvell/
H A Dphy-mvebu-a3700-comphy.c1 // SPDX-License-Identifier: GPL-2.0
11 * Structure inspired from phy-mvebu-cp110-comphy.c written by Antoine Tenart.
41 * since the registers are 16-bit.
184 #define COMPHY_PHY_REG(lane, reg) (((1 - (lane)) * 0x28) + ((reg) & 0x3f))
187 * lane0: USB3/GbE1 PHY Configuration 1
208 * lane0: USB3/GbE1 PHY Status 1
221 /* bit4: 0: Lane0 is GbE1; 1: Lane0 is USB3 */
223 /* bit8: 0: Lane0 is USB3 instead of GbE1, Lane2 is SATA; 1: Lane2 is USB3 */
263 void __iomem *lane0_phy_regs; /* USB3 and GbE1 */
301 /*-----------------------------------------------------------*/
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/linux/arch/mips/sgi-ip32/
H A Dip32-irq.c31 #include "ip32-common.h"
36 crime->control; in flush_crime_bus()
41 mace->perif.ctrl.misc; in flush_mace_bus()
47 * IP0 -> software (ignored)
48 * IP1 -> software (ignored)
49 * IP2 -> (irq0) C crime 1.1 all interrupts; crime 1.5 ???
50 * IP3 -> (irq1) X unknown
51 * IP4 -> (irq2) X unknown
52 * IP5 -> (irq3) X unknown
53 * IP6 -> (irq4) X unknown
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-toradex-smarc.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 #include <dt-bindings/phy/phy-imx8-pcie.h>
5 #include <dt-bindings/net/ti-dp83867.h>
26 stdout-path = &uart4;
30 compatible = "gpio-usb-b-connector", "usb-b-connector";
31 pinctrl-names = "default";
32 pinctrl-0 = <&pinctrl_usb0_id>;
33 id-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
35 self-powered;
37 vbus-supply = <&reg_usb0_vbus>;
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