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Searched +full:gain +full:- +full:offset (Results 1 – 25 of 69) sorted by relevance

123

/titanic_51/usr/src/cmd/audio/include/
H A DAudioGain.h23 * Copyright (c) 1993-2001 by Sun Microsystems, Inc.
38 // Class to handle gain calculations
41 #define AUDIO_GAIN_INSTANT (1) // Gain for level meter
42 #define AUDIO_GAIN_WEIGHTED (2) // Gain for agc
54 static const double DCtimeconstant; // DC offset time constant
58 Double DCaverage; // weighted DC offset
59 Double instant_gain; // current (instantaneous) gain
73 // calculate instant gain
76 // calculate weighted gain
91 virtual double InstantGain(); // Get most recent gain
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/titanic_51/usr/src/uts/common/io/rtw/
H A Dsa2400reg.h18 * 3. Neither the name of the author nor the names of any co-contributors
43 * Serial bus format for Philips SA2400 Single-chip Transceiver.
50 * Registers for Philips SA2400 Single-chip Transceiver.
133 * 1: in Rx mode, RSSI-ADC always on
134 * 0: RSSI-ADC only on during AGC
138 * read-only filter tuner error:
193 * fine-tune AGC target:
194 * -7dB to 7dB, sign bit ...
197 #define SA2400_AGC_TARGET_MASK BITS(22, 20) /* ... plus 0dB - 7dB */
199 * maximum AGC gain,
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/titanic_51/usr/src/uts/common/io/iwk/
H A Diwk_calibration.h23 * Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
43 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
44 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
48 * Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
87 * 2) Receiver gain balance (and detect disconnected antennas)
97 * a txpower setting (amplifier gain is temperature dependent). The
100 * real-time temperature indicator.
108 * NOTE: uCode provides the R4 value as a 23-bit signed value. Driver
109 * must sign-extend to 32 bits before applying formula below.
113 * degrees Kelvin = ((97 * 259 * (R4 - R
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H A Diwk_hw.h21 * Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
41 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
42 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
46 * Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
98 * TFDB Area - TFDs buffer table
104 * channels 0 - 8
110 * TFDIB Area - TFD Immediate Buffer
116 * channels 0 - 10
148 * TRB Area - Transmit Request Buffers
154 * channels 0 -
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/titanic_51/usr/src/uts/common/io/audio/drv/audiols/
H A Daudiols.c30 * Copyright (C) 4Front Technologies 1996-2009.
153 mutex_enter(&dev->low_mutex); in read_chan()
158 mutex_exit(&dev->low_mutex); in read_chan()
166 mutex_enter(&dev->low_mutex); in write_chan()
171 mutex_exit(&dev->low_mutex); in write_chan()
194 mutex_enter(&dev->low_mutex); in audigyls_read_ac97()
201 mutex_exit(&dev->low_mutex); in audigyls_read_ac97()
205 mutex_exit(&dev->low_mutex); in audigyls_read_ac97()
216 mutex_enter(&dev->low_mutex); in audigyls_write_ac97()
223 mutex_exit(&dev->low_mute in audigyls_write_ac97()
443 uint32_t offset, n; audigyls_count() local
470 audigyls_chinfo(void * arg,int chan,unsigned * offset,unsigned * incr) audigyls_chinfo() argument
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/titanic_51/usr/src/uts/common/io/arn/
H A Darn_calib.c27 static const int16_t NOISE_FLOOR[] = { -96, -93, -98, -96, -93, -96 };
30 #define ATH9K_NF_TOO_LOW -60
33 * AR5416 may return very high value (like -31 dBm), in those cases the nf
64 for (i = 0; i < ATH9K_NF_CAL_HIST_MAX - 1; i++) { in ath9k_hw_get_nf_hist_mid()
65 for (j = 1; j < ATH9K_NF_CAL_HIST_MAX - in ath9k_hw_get_nf_hist_mid()
870 int i, offset, offs_6_1, offs_0; ath9k_hw_9285_pa_cal() local
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/titanic_51/usr/src/uts/common/io/audio/drv/audiohd/
H A Daudiohd.h80 #define AUDIOHDC_NULL_NODE -1
81 #define AUDIOHD_NULL_CONN ((uint_t)(-1))
169 #define AUDIOHD_ROUNDUP(x, algn) (((x) + ((algn) - 1)) & ~((algn) - 1))
238 * Offset of Stream Descriptor Registers
310 * HD audio verbs can be either 12-bit or 4-bit in length.
321 * 12-bit verbs
379 * 4-bit verbs
409 * bits for get/set amplifier gain/mut
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/titanic_51/usr/src/uts/common/io/audio/drv/audiocmi/
H A Daudiocmi.h31 * Copyright (C) 4Front Technologies 1996-2008.
155 #define MISC_SPD32SEL BIT(21) /* 32-bit SPDIF (default 16-bit) */
163 #define MIX2_SPK4 BIT(5) /* line-in is rear out */
168 #define MIX2_CDPLAY BIT(0) /* spdif-in PCM to DAC */
172 #define MIX3_VAUXRM BIT(5) /* r-aux mute */
173 #define MIX3_VAUXLM BIT(4) /* l-aux mute */
176 #define MIX3_MICGAINZ BIT(0) /* mic gain */
288 uint32_t offset; /* in bytes */ member
318 * The hardware appears to be able to address up to 16-bit
324 GET8(dev,offset) global() argument
326 GET16(dev,offset) global() argument
328 GET32(dev,offset) global() argument
330 PUT8(dev,offset,v) global() argument
332 PUT16(dev,offset,v) global() argument
334 PUT32(dev,offset,v) global() argument
337 CLR8(dev,offset,v) global() argument
338 SET8(dev,offset,v) global() argument
339 CLR16(dev,offset,v) global() argument
340 SET16(dev,offset,v) global() argument
341 CLR32(dev,offset,v) global() argument
342 SET32(dev,offset,v) global() argument
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H A Daudiocmi.c30 * Copyright (C) 4Front Technologies 1996-2008.
57 * Note that each variant (CMI 8338, 8738-033, -037, -055, and 8768)
96 cmpci_dev_t *dev = port->dev; in cmpci_open()
100 mutex_enter(&dev->mutex); in cmpci_open()
102 *nframesp = port->nframes; in cmpci_open()
103 *bufp = port->kaddr; in cmpci_open()
105 port->count = 0; in cmpci_open()
106 mutex_exit(&dev->mute in cmpci_open()
230 uint32_t offset; cmpci_count() local
659 cmpci_chinfo(void * arg,int chan,unsigned * offset,unsigned * incr) cmpci_chinfo() argument
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/titanic_51/usr/src/cmd/backup/dump/
H A Ddumponline.c34 * Uncomment if using mmap'ing of files for pre-fetch.
96 maxino = (unsigned)(sblock->fs_ipg * sblock->fs_ncg); in allocino()
103 nused = maxino - sblock->fs_cstotal.cs_nifree; in allocino()
141 while (last && last->id_inumber < ino)
142 last = last->id_next;
168 * 0 if not mounted, -1 on error.
182 return (-1);
189 return (-
221 mapfile(fd,offset,bytes,fetch) mapfile() argument
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/titanic_51/usr/src/uts/common/sys/audio/
H A Daudio_driver.h22 * Copyright (C) 4Front Technologies 1996-2008.
65 * Obtain the engine offset. Offsets start at zero at engine_open,
110 * We obtain both the starting offset within the buffer, and the
115 void (*audio_engine_chinfo)(void *, int chan, uint_t *offset,
168 #define ENGINE_NDELAY (1U << 21) /* non-blocking open */
205 * is no "gain", so using this instead of a hardware control may
/titanic_51/usr/src/uts/sun/io/audio/drv/audiocs/
H A Daudio_4231.c184 /* play gain array, converts linear gain to 64 steps of log10 gain */
186 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, /* [000] -> [004] */
187 0x3a, 0x39, 0x38, 0x37, 0x36, /* [005] -> [009] */
188 0x35, 0x34, 0x33, 0x32, 0x31, /* [010] -> [014] */
189 0x30, 0x2f, 0x2e, 0x2d, 0x2c, /* [015] -> [019] */
190 0x2b, 0x2a, 0x29, 0x29, 0x28, /* [020] -> [024] */
191 0x28, 0x27, 0x27, 0x26, 0x26, /* [025] -> [029] */
192 0x25, 0x25, 0x24, 0x24, 0x23, /* [030] -> [03
1637 audiocs_set_mgain(void * arg,uint64_t gain) audiocs_set_mgain() argument
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/titanic_51/usr/src/man/man7d/
H A Ddcam1394.7d8 dcam1394 \- 1394-based digital camera (IIDC) driver
24 Isochronous data is read from the driver frame-by-frame and is maintained
43 .in -2
81 .in -2
83 The offs field should be set to the offset of the register from which to read.
84 Register offset values are defined in the \fI1394 Trade Association Digital
101 The offs field should be set to the offset of the register from which to read.
102 The register offset value
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/titanic_51/usr/src/uts/common/sys/
H A Dctf_api.h33 * a debugger to operate on data in the Compact ANSI-C Type Format (CTF).
35 * the fullness of time after we gain more experience with the interfaces.
69 ECTF_ENDIAN, /* data is different endian-ness than lib */
85 ECTF_BADNAME, /* string offset is corrupt w.r.t. strtab */
105 ECTF_RDONLY, /* CTF container is read-only */
134 off64_t cts_offset; /* file offset of this section (if any) */
138 * Encoding information for integers, floating-point values, and certain other
144 uint_t cte_offset; /* offset of value in bits */
150 ulong_t ctm_offset; /* offset of member in bits */
175 #define CTF_ERR (-
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/titanic_51/usr/src/uts/sun4u/daktari/os/
H A Ddaktari.c134 "mc-us3", in load_platform_drivers()
147 * mc-us3 & ssc050 must stay loaded for plat_get_mem_unum() in load_platform_drivers()
150 (void) ddi_hold_driver(ddi_name_to_major("mc-us3")); in load_platform_drivers()
153 /* Gain access into the ssc050_get_port function */ in load_platform_drivers()
165 * prevent detach of i2c-ssc050 in load_platform_drivers()
177 char *compatible = NULL; /* Search tree for "i2c-ssc050" */ in daktari_dev_search()
186 if (strcmp(compatible, "i2c-ssc050") == 0) { in daktari_dev_search()
276 *last = base + len - 1; in plat_discover_slice()
305 end = base + size - 1; in update_mem_bounds()
311 * boards (cross-boar in update_mem_bounds()
342 uint64_t offset; plat_fill_mc() local
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/titanic_51/usr/src/uts/sun4u/cherrystone/os/
H A Dcherrystone.c138 "mc-us3", in load_platform_drivers()
150 * mc-us3 and ssc050 must stay loaded for plat_get_mem_unum() in load_platform_drivers()
153 (void) ddi_hold_driver(ddi_name_to_major("mc-us3")); in load_platform_drivers()
156 /* Gain access into the ssc050_get_port function */ in load_platform_drivers()
164 e_ddi_walk_driver("i2c-ssc050", cherry_dev_search, (void *)&keysw_dip); in load_platform_drivers()
168 * prevent detach of i2c-ssc050 in load_platform_drivers()
197 if (strcmp(ddi_binding_name(dip), "i2c-ssc050") != 0) in cherry_dev_search()
285 *last = base + len - 1; in plat_discover_slice()
313 end = base + size - 1; in update_mem_bounds()
319 * boards (cross-boar in update_mem_bounds()
350 uint64_t offset; plat_fill_mc() local
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/titanic_51/usr/src/uts/common/io/wpi/
H A Dwpireg.h36 * Rings must be aligned on a four 4K-pages boundary.
118 #define WPI_MEM_4 ((sizeof (uint32_t) - 1) << 24)
218 #define WPI_PAD32(x) (roundup(x, 4) - (x))
260 uint8_t agc; /* access gain control */
634 ddi_get32((sc)->sc_handle, (uint32_t *)((sc)->sc_base + (reg)))
637 ddi_put32((sc)->sc_handle, (uint32_t *)((sc)->sc_base + (reg)), (val))
639 #define WPI_WRITE_REGION_4(sc, offset, datap, count) { \ argument
641 uint32_t s = (offset); \
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/titanic_51/usr/src/uts/common/io/audio/drv/audiots/
H A Daudiots.c34 * not available because their pins have been re-assigned to expose
36 * ports. The audio core controls an AC-97 V2.1 Codec.
45 * The audio core has a bug in silicon that doesn't let it read the AC-97
50 * the loop. Unfortunately there is also a problem with writing the AC-97
72 * must always be 16-bits. This will keep any future change in the
82 * NOTE: The AC-97 Codec's reset pin is set to PCI reset, so we
208 nulldev, /* devo_identify - obsolete */
243 /* Device attribute structure - full 4 gig address range */
248 0x0000000000003fffLL, /* DMA counter register - 16 bits */
249 0x0000000000000008LL, /* DMA address alignment, 64-bi
1363 audiots_chinfo(void * arg,int chan,unsigned * offset,unsigned * incr) audiots_chinfo() argument
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/titanic_51/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_x540.c3 Copyright (c) 2001-2015, Intel Corporation
53 * ixgbe_init_ops_X540 - Inits func ptrs and MAC type
61 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_ops_X540()
62 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_ops_X540()
63 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_init_ops_X540()
73 eeprom->ops.init_params = ixgbe_init_eeprom_params_X540; in ixgbe_init_ops_X540()
74 eeprom->ops.read = ixgbe_read_eerd_X540; in ixgbe_init_ops_X540()
75 eeprom->ops.read_buffer = ixgbe_read_eerd_buffer_X540; in ixgbe_init_ops_X540()
76 eeprom->ops.write = ixgbe_write_eewr_X540; in ixgbe_init_ops_X540()
77 eeprom->op in ixgbe_init_ops_X540()
379 ixgbe_read_eerd_X540(struct ixgbe_hw * hw,u16 offset,u16 * data) ixgbe_read_eerd_X540() argument
405 ixgbe_read_eerd_buffer_X540(struct ixgbe_hw * hw,u16 offset,u16 words,u16 * data) ixgbe_read_eerd_buffer_X540() argument
430 ixgbe_write_eewr_X540(struct ixgbe_hw * hw,u16 offset,u16 data) ixgbe_write_eewr_X540() argument
456 ixgbe_write_eewr_buffer_X540(struct ixgbe_hw * hw,u16 offset,u16 words,u16 * data) ixgbe_write_eewr_buffer_X540() argument
[all...]
/titanic_51/usr/src/cmd/praudit/
H A Dtoktable.c66 * To gain a better understanding of each token, read in init_tokens()
203 table_init(TAG_AUID, "audit-uid", pa_pw_uid, T_ATTRIBUTE); in init_tokens()
218 table_init(TAG_IP_LOCAL, "local-port", pa_adr_u_short, T_ATTRIBUTE); in init_tokens()
219 table_init(TAG_IP_REMOTE, "remote-port", pa_adr_u_short, T_ATTRIBUTE); in init_tokens()
222 table_initx(TAG_EVMOD, "event-modifier", "modifier", in init_tokens()
224 table_initx(TAG_EVTYPE, "event-type", "event", in init_tokens()
226 table_initx(TAG_TOKVERS, "token-version", "version", in init_tokens()
234 table_init(TAG_SETTYPE, "set-type", pa_adr_string, T_ATTRIBUTE); in init_tokens()
235 /* Sub-element of groups & newgroups token: */ in init_tokens()
239 table_init(TAG_XCUID, "xcreator-ui in init_tokens()
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/titanic_51/usr/src/uts/common/io/e1000api/
H A De1000_phy.c3 Copyright (c) 2001-2015, Intel Corporation
38 static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
41 static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,
65 * e1000_init_phy_ops_generic - Initialize PHY function pointers
68 * Setups up the function pointers to no-op functions
72 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_ops_generic()
76 phy->ops.init_params = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
77 phy->ops.acquire = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
78 phy->ops.check_polarity = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
79 phy->op in e1000_init_phy_ops_generic()
119 e1000_null_read_reg(struct e1000_hw E1000_UNUSEDARG * hw,u32 E1000_UNUSEDARG offset,u16 E1000_UNUSEDARG * data) e1000_null_read_reg() argument
151 e1000_null_write_reg(struct e1000_hw E1000_UNUSEDARG * hw,u32 E1000_UNUSEDARG offset,u16 E1000_UNUSEDARG data) e1000_null_write_reg() argument
284 e1000_read_phy_reg_mdic(struct e1000_hw * hw,u32 offset,u16 * data) e1000_read_phy_reg_mdic() argument
349 e1000_write_phy_reg_mdic(struct e1000_hw * hw,u32 offset,u16 data) e1000_write_phy_reg_mdic() argument
415 e1000_read_phy_reg_i2c(struct e1000_hw * hw,u32 offset,u16 * data) e1000_read_phy_reg_i2c() argument
462 e1000_write_phy_reg_i2c(struct e1000_hw * hw,u32 offset,u16 data) e1000_write_phy_reg_i2c() argument
523 e1000_read_sfp_data_byte(struct e1000_hw * hw,u16 offset,u8 * data) e1000_read_sfp_data_byte() argument
578 e1000_write_sfp_data_byte(struct e1000_hw * hw,u16 offset,u8 data) e1000_write_sfp_data_byte() argument
648 e1000_read_phy_reg_m88(struct e1000_hw * hw,u32 offset,u16 * data) e1000_read_phy_reg_m88() argument
678 e1000_write_phy_reg_m88(struct e1000_hw * hw,u32 offset,u16 data) e1000_write_phy_reg_m88() argument
730 __e1000_read_phy_reg_igp(struct e1000_hw * hw,u32 offset,u16 * data,bool locked) __e1000_read_phy_reg_igp() argument
770 e1000_read_phy_reg_igp(struct e1000_hw * hw,u32 offset,u16 * data) e1000_read_phy_reg_igp() argument
784 e1000_read_phy_reg_igp_locked(struct e1000_hw * hw,u32 offset,u16 * data) e1000_read_phy_reg_igp_locked() argument
799 __e1000_write_phy_reg_igp(struct e1000_hw * hw,u32 offset,u16 data,bool locked) __e1000_write_phy_reg_igp() argument
838 e1000_write_phy_reg_igp(struct e1000_hw * hw,u32 offset,u16 data) e1000_write_phy_reg_igp() argument
852 e1000_write_phy_reg_igp_locked(struct e1000_hw * hw,u32 offset,u16 data) e1000_write_phy_reg_igp_locked() argument
868 __e1000_read_kmrn_reg(struct e1000_hw * hw,u32 offset,u16 * data,bool locked) __e1000_read_kmrn_reg() argument
912 e1000_read_kmrn_reg_generic(struct e1000_hw * hw,u32 offset,u16 * data) e1000_read_kmrn_reg_generic() argument
927 e1000_read_kmrn_reg_locked(struct e1000_hw * hw,u32 offset,u16 * data) e1000_read_kmrn_reg_locked() argument
943 __e1000_write_kmrn_reg(struct e1000_hw * hw,u32 offset,u16 data,bool locked) __e1000_write_kmrn_reg() argument
983 e1000_write_kmrn_reg_generic(struct e1000_hw * hw,u32 offset,u16 data) e1000_write_kmrn_reg_generic() argument
997 e1000_write_kmrn_reg_locked(struct e1000_hw * hw,u32 offset,u16 data) e1000_write_kmrn_reg_locked() argument
2164 u16 phy_data, offset, mask; e1000_check_downshift_generic() local
2236 u16 data, offset, mask; e1000_check_polarity_igp() local
2279 u16 phy_data, offset, mask; e1000_check_polarity_ife() local
3111 e1000_write_phy_reg_bm(struct e1000_hw * hw,u32 offset,u16 data) e1000_write_phy_reg_bm() argument
3171 e1000_read_phy_reg_bm(struct e1000_hw * hw,u32 offset,u16 * data) e1000_read_phy_reg_bm() argument
3230 e1000_read_phy_reg_bm2(struct e1000_hw * hw,u32 offset,u16 * data) e1000_read_phy_reg_bm2() argument
3275 e1000_write_phy_reg_bm2(struct e1000_hw * hw,u32 offset,u16 data) e1000_write_phy_reg_bm2() argument
3428 e1000_access_phy_wakeup_reg_bm(struct e1000_hw * hw,u32 offset,u16 * data,bool read,bool page_set) e1000_access_phy_wakeup_reg_bm() argument
3531 __e1000_read_phy_reg_hv(struct e1000_hw * hw,u32 offset,u16 * data,bool locked,bool page_set) __e1000_read_phy_reg_hv() argument
3597 e1000_read_phy_reg_hv(struct e1000_hw * hw,u32 offset,u16 * data) e1000_read_phy_reg_hv() argument
3611 e1000_read_phy_reg_hv_locked(struct e1000_hw * hw,u32 offset,u16 * data) e1000_read_phy_reg_hv_locked() argument
3625 e1000_read_phy_reg_page_hv(struct e1000_hw * hw,u32 offset,u16 * data) e1000_read_phy_reg_page_hv() argument
3640 __e1000_write_phy_reg_hv(struct e1000_hw * hw,u32 offset,u16 data,bool locked,bool page_set) __e1000_write_phy_reg_hv() argument
3722 e1000_write_phy_reg_hv(struct e1000_hw * hw,u32 offset,u16 data) e1000_write_phy_reg_hv() argument
3736 e1000_write_phy_reg_hv_locked(struct e1000_hw * hw,u32 offset,u16 data) e1000_write_phy_reg_hv_locked() argument
3750 e1000_write_phy_reg_page_hv(struct e1000_hw * hw,u32 offset,u16 data) e1000_write_phy_reg_page_hv() argument
3781 e1000_access_phy_debug_regs_hv(struct e1000_hw * hw,u32 offset,u16 * data,bool read) e1000_access_phy_debug_regs_hv() argument
4044 e1000_write_phy_reg_gs40g(struct e1000_hw * hw,u32 offset,u16 data) e1000_write_phy_reg_gs40g() argument
4076 e1000_read_phy_reg_gs40g(struct e1000_hw * hw,u32 offset,u16 * data) e1000_read_phy_reg_gs40g() argument
[all...]
H A De1000_82541.c3 Copyright (c) 2001-2015, Intel Corporation
82 * e1000_init_phy_params_82541 - Init PHY func ptrs.
87 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82541()
92 phy->addr = 1; in e1000_init_phy_params_82541()
93 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82541()
94 phy->reset_delay_us = 10000; in e1000_init_phy_params_82541()
95 phy->type = e1000_phy_igp; in e1000_init_phy_params_82541()
98 phy->ops.check_polarity = e1000_check_polarity_igp; in e1000_init_phy_params_82541()
99 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp; in e1000_init_phy_params_82541()
100 phy->op in e1000_init_phy_params_82541()
1283 u16 offset, nvm_data, i; e1000_read_mac_addr_82541() local
[all...]
/titanic_51/usr/src/man/man3c/
H A Ddldump.3c8 dldump \- create a new file from a dynamic object component of the calling
24 file. Relocations can be applied to the new object to pre-bind it to other
49 into two basic types: \fInon-symbolic\fR and \fIsymbolic\fR.
52 The \fInon-symbolic\fR relocation is a simple \fIrelative\fR relocation that
69 affect the relocations that are applied to the new object. \fINon-symbolic\fR
222 \fBdldump()\fR. It will gain control at the executable's normal entry point.
227 Otherwise, a non-zero value is returned and more detailed diagnostic
247 .in -2
325 .in -2
368 re-initializatio
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/titanic_51/usr/src/man/man1m/
H A Dufsdump.1m9 ufsdump \- incremental file system dump
25 mounted read-only. Attempting to dump a mounted, read-write file system might
28 you need a point-in-time image of a file system that is mounted.
33 a non-root user might result in the creation of an inconsistent dump.
36 \fIoptions\fR is a single string of one-letter \fBufsdump\fR options.
49 With most devices \fBufsdump\fR can automatically detect the end-of-media.
51 multi-volum
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/titanic_51/usr/src/uts/common/os/
H A Dmutex.c65 * a little harder in the (rarely-executed) blocking path to make sure
66 * we don't block on a mutex that's just been released -- otherwise we
74 * interrupted PC in the interrupt handler (or on return from trap --
154 * blocked, so they'll block too. And so on -- it escalates quickly,
158 * Option (2) is the next most natural-seeming option, but it has several
160 * the waiters bit on an unheld lock. On cas-capable platforms, where
167 * Option (3), the least-intuitiv
593 ulong_t offset = 0; mutex_init() local
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