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12

/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dfsl,fman-port.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/fsl,fman-port.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Frame Manager Port Device
10 - Frank Li <Frank.Li@nxp.com>
13 The Frame Manager (FMan) supports several types of hardware ports:
21 - fsl,fman-v2-port-oh
22 - fsl,fman-v2-port-rx
23 - fsl,fman-v2-port-tx
[all …]
H A Dfsl-fman.txt5 - FMan Node
6 - FMan Port Node
7 - FMan MURAM Node
8 - FMan dTSEC/XGEC/mEMAC Node
9 - FMan IEEE 1588 Node
10 - FMan MDIO Node
11 - Example
14 FMan Node
18 Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
19 etc.) the FMan node will have child nodes for each of them.
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dqoriq-fman3-0-10g-1.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * QorIQ FMan v3 10g port #1 device tree
5 * Copyright 2012-2015 Freescale Semiconductor Inc.
9 fman@1a00000 {
10 fman0_rx_0x11: port@91000 {
11 cell-index = <0x11>;
12 compatible = "fsl,fman-v3-port-rx";
14 fsl,fman-10g-port;
17 fman0_tx_0x31: port@b1000 {
18 cell-index = <0x31>;
[all …]
H A Dqoriq-fman3-0-10g-0.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * QorIQ FMan v3 10g port #0 device tree
5 * Copyright 2012-2015 Freescale Semiconductor Inc.
9 fman@1a00000 {
10 fman0_rx_0x10: port@90000 {
11 cell-index = <0x10>;
12 compatible = "fsl,fman-v3-port-rx";
14 fsl,fman-10g-port;
17 fman0_tx_0x30: port@b0000 {
18 cell-index = <0x30>;
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dqoriq-fman3-0-10g-2.dtsi1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
3 * QorIQ FMan v3 10g port #2 device tree stub [ controller @ offset 0x400000 ]
6 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
9 fman@400000 {
10 fman0_rx_0x08: port@88000 {
11 cell-index = <0x8>;
12 compatible = "fsl,fman-v3-port-rx";
14 fsl,fman-10g-port;
17 fman0_tx_0x28: port@a8000 {
18 cell-index = <0x28>;
[all …]
H A Dqoriq-fman3-0-10g-3.dtsi1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
3 * QorIQ FMan v3 10g port #3 device tree stub [ controller @ offset 0x400000 ]
6 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
9 fman@400000 {
10 fman0_rx_0x09: port@89000 {
11 cell-index = <0x9>;
12 compatible = "fsl,fman-v3-port-rx";
14 fsl,fman-10g-port;
17 fman0_tx_0x29: port@a9000 {
18 cell-index = <0x29>;
[all …]
H A Dqoriq-fman3-0-10g-0.dtsi2 * QorIQ FMan v3 10g port #0 device tree stub [ controller @ offset 0x400000 ]
4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
35 fman@400000 {
36 fman0_rx_0x10: port@90000 {
37 cell-index = <0x10>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
43 fman0_tx_0x30: port@b0000 {
44 cell-index = <0x30>;
45 compatible = "fsl,fman-v3-port-tx";
[all …]
H A Dqoriq-fman3-0-10g-1.dtsi2 * QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x400000 ]
4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
35 fman@400000 {
36 fman0_rx_0x11: port@91000 {
37 cell-index = <0x11>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
43 fman0_tx_0x31: port@b1000 {
44 cell-index = <0x31>;
45 compatible = "fsl,fman-v3-port-tx";
[all …]
H A Dqoriq-fman3-1-10g-0.dtsi2 * QorIQ FMan v3 10g port #0 device tree stub [ controller @ offset 0x500000 ]
4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
35 fman@500000 {
36 fman1_rx_0x10: port@90000 {
37 cell-index = <0x10>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
43 fman1_tx_0x30: port@b0000 {
44 cell-index = <0x30>;
45 compatible = "fsl,fman-v3-port-tx";
[all …]
H A Dqoriq-fman3-1-10g-1.dtsi2 * QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x500000 ]
4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
35 fman@500000 {
36 fman1_rx_0x11: port@91000 {
37 cell-index = <0x11>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
43 fman1_tx_0x31: port@b1000 {
44 cell-index = <0x31>;
45 compatible = "fsl,fman-v3-port-tx";
[all …]
H A Dqoriq-fman3-0-10g-1-best-effort.dtsi2 * QorIQ FMan v3 1g port #1 device tree stub [ controller @ offset 0x400000 ]
4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
35 fman@400000 {
36 fman0_rx_0x09: port@89000 {
37 cell-index = <0x9>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
41 fsl,fman-best-effort-port;
44 fman0_tx_0x29: port@a9000 {
45 cell-index = <0x29>;
[all …]
H A Dqoriq-fman3-0-10g-0-best-effort.dtsi2 * QorIQ FMan v3 1g port #0 device tree stub [ controller @ offset 0x400000 ]
4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
35 fman@400000 {
36 fman0_rx_0x08: port@88000 {
37 cell-index = <0x8>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
41 fsl,fman-best-effort-port;
44 fman0_tx_0x28: port@a8000 {
45 cell-index = <0x28>;
[all …]
H A Dqoriq-fman-0-10g-0.dtsi2 * QorIQ FMan 10g port #0 device tree stub [ controller @ offset 0x400000 ]
4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
35 fman@400000 {
36 fman0_rx_0x10: port@90000 {
37 cell-index = <0x10>;
38 compatible = "fsl,fman-v2-port-rx";
42 fman0_tx_0x30: port@b0000 {
43 cell-index = <0x30>;
44 compatible = "fsl,fman-v2-port-tx";
49 cell-index = <0x8>;
[all …]
H A Dqoriq-fman-1-10g-0.dtsi2 * QorIQ FMan 10g port #0 device tree stub [ controller @ offset 0x500000 ]
4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
35 fman@500000 {
36 fman1_rx_0x10: port@90000 {
37 cell-index = <0x10>;
38 compatible = "fsl,fman-v2-port-rx";
42 fman1_tx_0x30: port@b0000 {
43 cell-index = <0x30>;
44 compatible = "fsl,fman-v2-port-tx";
49 cell-index = <0x8>;
[all …]
H A Dt2081si-post.dtsi4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 #address-cells = <2>;
52 #size-cells = <1>;
59 compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
[all …]
H A Dt1040si-post.dtsi4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
35 #include <dt-bindings/thermal/thermal.h>
38 compatible = "fsl,bman-fbpr";
39 alloc-ranges = <0 0 0x10000 0>;
43 compatible = "fsl,qman-fqd";
44 alloc-ranges = <0 0 0x10000 0>;
48 compatible = "fsl,qman-pfdr";
49 alloc-ranges = <0 0 0x10000 0>;
53 #address-cells = <2>;
54 #size-cells = <1>;
[all …]
/freebsd/sys/dts/powerpc/
H A Dp3041si.dtsi4 * Copyright 2010-2011 Freescale Semiconductor Inc.
35 /dts-v1/;
39 #address-cells = <2>;
40 #size-cells = <2>;
41 interrupt-parent = <&mpic>;
102 #address-cells = <1>;
103 #size-cells = <0>;
108 bus-frequency = <749999996>;
109 next-level-cache = <&L2_0>;
110 L2_0: l2-cache {
[all …]
H A Dp2041si.dtsi35 /dts-v1/;
39 #address-cells = <2>;
40 #size-cells = <2>;
41 interrupt-parent = <&mpic>;
101 #address-cells = <1>;
102 #size-cells = <0>;
107 bus-frequency = <749999996>;
108 next-level-cache = <&L2_0>;
109 L2_0: l2-cache {
110 next-level-cache = <&cpc>;
[all …]
H A Dp5020si.dtsi4 * Copyright 2010-2011 Freescale Semiconductor Inc.
35 /dts-v1/;
39 #address-cells = <2>;
40 #size-cells = <2>;
41 interrupt-parent = <&mpic>;
108 #address-cells = <1>;
109 #size-cells = <0>;
114 bus-frequency = <799999998>;
115 next-level-cache = <&L2_0>;
116 L2_0: l2-cache {
[all …]
/freebsd/sys/contrib/ncsw/Peripherals/FM/inc/
H A Dfm_common.h2 * Copyright 2008-2012 Freescale Semiconductor Inc.
79 @Description Enum for inter-module interrupts registration
85 e_FM_MOD_10G_MAC, /**< 10G MAC event */
86 e_FM_MOD_1G_MAC, /**< 1G MAC event */
88 e_FM_MOD_FMAN_CTRL, /**< FMAN Controller Timer event */
102 @Description Enum for inter-module interrupts registration
112 e_FM_EV_ERR_10G_MAC0, /**< 10G MAC 0 error event */
113 e_FM_EV_ERR_10G_MAC1, /**< 10G MAC 1 error event */
114 e_FM_EV_ERR_1G_MAC0, /**< 1G MAC 0 error event */
115 e_FM_EV_ERR_1G_MAC1, /**< 1G MAC 1 error event */
[all …]
/freebsd/sys/contrib/ncsw/Peripherals/FM/
H A Dfm_ncsw.c2 * Copyright 2008-2012 Freescale Semiconductor Inc.
71 if (p_Fm->camBaseAddr) in FreeInitResources()
72 FM_MURAM_FreeMem(p_Fm->h_FmMuram, UINT_TO_PTR(p_Fm->camBaseAddr)); in FreeInitResources()
73 if (p_Fm->fifoBaseAddr) in FreeInitResources()
74 FM_MURAM_FreeMem(p_Fm->h_FmMuram, UINT_TO_PTR(p_Fm->fifoBaseAddr)); in FreeInitResources()
75 if (p_Fm->resAddr) in FreeInitResources()
76 FM_MURAM_FreeMem(p_Fm->h_FmMuram, UINT_TO_PTR(p_Fm->resAddr)); in FreeInitResources()
84 p_Iram = (t_FMIramRegs *)UINT_TO_PTR(p_Fm->baseAddr + FM_MM_IMEM); in IsFmanCtrlCodeLoaded()
86 return (bool)!!(GET_UINT32(p_Iram->iready) & IRAM_READY); in IsFmanCtrlCodeLoaded()
91 if (IsFmanCtrlCodeLoaded(p_Fm) && !p_Fm->resetOnInit) in CheckFmParameters()
[all …]
/freebsd/sys/contrib/ncsw/inc/Peripherals/
H A Dfm_port_ext.h1 /* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
37 @Description FM-Port Application Programming Interface.
59 @Group FM_PORT_grp FM Port
61 @Description FM Port API
63 The FM uses a general module called "port" to represent a Tx port
64 (MAC), an Rx port (MAC) or Offline Parsing port.
66 The SW driver manages these ports as sub-modules of the FM, i.e.
70 The port is initialized aware of its type, but other functions on
71 a port may be indifferent to its type. When necessary, the driver
74 On initialization, user specifies the port type and it's index
[all …]
H A Dfm_ext.h1 /* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
65 run-time control routines. This module must be initialized always
67 NOTE - We assume that the FM library will be initialized only by core No. 0!
73 @Description Enum for defining port types
76 e_FM_PORT_TYPE_OH_OFFLINE_PARSING = 0, /**< Offline parsing port */
77 e_FM_PORT_TYPE_RX, /**< 1G Rx port */
78 e_FM_PORT_TYPE_RX_10G, /**< 10G Rx port */
79 e_FM_PORT_TYPE_TX, /**< 1G Tx port */
80 e_FM_PORT_TYPE_TX_10G, /**< 10G Tx port */
108 volatile uint8_t lpid; /**< Logical port id */
[all …]
H A Dfm_pcd_ext.h1 /* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
60 @Description Frame Manager PCD (Parse-Classify-Distribute) API.
69 entities, it will register to it using the FM PORT API. The PCD
70 module will manage the PCD resources - i.e. resource management of
82 #define FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS (32 - FM_PCD_MAX_NUM_OF_PRIVATE_HDRS)
98 …MAGE_SIZE (FM_PCD_SW_PRS_SIZE /*- FM_PCD_PRS_SW_OFFSET -FM_PCD_PRS_SW_TAIL_SIZE…
123 …e_FM_PCD_PLCR_COUNTERS_RED, /**< Policer counter - counts the tota…
124 …e_FM_PCD_PLCR_COUNTERS_YELLOW, /**< Policer counter - counts the tota…
125 …e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_RED, /**< Policer counter - counts the numb…
127 …e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_YELLOW, /**< Policer counter - counts the numb…
[all …]
/freebsd/sys/contrib/ncsw/Peripherals/FM/MAC/
H A Dmemac.c2 * Copyright 2008-2012 Freescale Semiconductor Inc.
75 xorVal |= (mask1 << (5-i)); in GetMacAddrHashCode()
88 /* In case the higher MACs are used (i.e. the MACs that should support 10G), in SetupSgmiiInternalPhy()
90 to 1G one, so MII functions can work correctly. */ in SetupSgmiiInternalPhy()
91 enetMode = p_Memac->enetMode; in SetupSgmiiInternalPhy()
95 if ((p_Memac->enetMode) == e_ENET_MODE_SGMII_2500) in SetupSgmiiInternalPhy()
98 …p_Memac->enetMode = MAKE_ENET_MODE(ENET_INTERFACE_FROM_MODE(p_Memac->enetMode), e_ENET_SPEED_1000); in SetupSgmiiInternalPhy()
105 /* Adjust link timer for SGMII - in SetupSgmiiInternalPhy()
108 - When running as 1G SGMII, Serdes clock is 125 MHz, so in SetupSgmiiInternalPhy()
109 unit = 1 / (125*10^6 Hz) = 8 ns. in SetupSgmiiInternalPhy()
[all …]

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