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/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Doverlay.c22 * Implementation based on the pre-KMS implementation in xf86-video-nouveau,
40 bool flip; member
70 * sin(x degrees) ~= 4 x (180 - x) / (40500 - x (180 - x) )
72 * Also note that sin(x) == -sin(x - 180)
78 degrees -= 180; in sin_mul()
79 factor *= -1; in sin_mul()
81 return factor * 4 * degrees * (180 - degrees) / in sin_mul()
82 (40500 - degrees * (180 - degrees)); in sin_mul()
85 /* cos(x) = sin(x + 90) */
98 DRM_DEBUG_KMS("Unsuitable framebuffer scaling: %dx%d -> %dx%d\n", in verify_scaling()
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/linux/drivers/media/platform/samsung/exynos4-is/
H A Dfimc-reg.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010 - 2013 Samsung Electronics Co., Ltd.
13 #include <media/drv-intf/exynos-fimc.h>
14 #include "media-dev.h"
16 #include "fimc-reg.h"
17 #include "fimc-core.h"
23 cfg = readl(dev->regs + FIMC_REG_CISRCFMT); in fimc_hw_reset()
25 writel(cfg, dev->regs + FIMC_REG_CISRCFMT); in fimc_hw_reset()
28 cfg = readl(dev->regs + FIMC_REG_CIGCTRL); in fimc_hw_reset()
30 writel(cfg, dev->regs + FIMC_REG_CIGCTRL); in fimc_hw_reset()
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/linux/include/uapi/drm/
H A Ddrm_mode.h5 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
6 * Copyright (c) 2007-2008 Intel Corporation
62 /* bit compatible with the xrandr RR_ definitions (bits 0-13)
176 * using the name->prop id lookup is the preferred method.
202 * using the name->prop id lookup is the preferred method.
222 * struct drm_mode_modeinfo - Display mode information.
239 * This is the user-space API display mode information structure. For the
284 __u32 x; /**< x Position on the framebuffer */ member
316 * struct drm_mode_get_plane - Ge
805 __s32 x; global() member
816 __s32 x; global() member
901 __u16 x, y; global() member
912 __u16 x, y; global() member
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/linux/drivers/input/touchscreen/
H A Dbu21013_ts.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson SA 2010
4 * Author: Naveen Kumar G <naveen.gaddipati@stericsson.com> for ST-Ericsson
140 * struct bu21013_ts - touch panel data structure
147 * @touch_x_max: maximum X coordinate reported by the device
149 * @x_flip: indicates that the driver should invert X coordinate before
176 ret = i2c_smbus_read_i2c_block_data(ts->client, in bu21013_read_block_data()
183 return -EINVAL; in bu21013_read_block_data()
188 struct input_dev *input = ts->in_dev; in bu21013_do_touch_report()
197 return -EINVAL; in bu21013_do_touch_report()
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/linux/kernel/sched/
H A Dloadavg.c1 // SPDX-License-Identifier: GPL-2.0
13 * Global load-average calculations
15 * We take a distributed and async approach to calculating the global load-avg
25 * nr_active += cpu_of(cpu)->nr_running + cpu_of(cpu)->nr_uninterruptible;
27 * avenrun[n] = avenrun[0] * exp_n + nr_active * (1 - exp_n)
31 * - for_each_possible_cpu() is prohibitively expensive on machines with
35 * \Sum_i x_i(t) = \Sum_i x_i(t) - x_i(t_0) | x_i(t_0) := 0
36 * = \Sum_i { \Sum_j=1 x_i(t_j) - x_i(t_j-1) }
38 * So assuming nr_active := 0 when we start out -- true per definition, we
39 * can simply take per-CPU deltas and fold those into a global accumulate
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/linux/drivers/media/platform/mediatek/mdp/
H A Dmtk_mdp_ipi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2015-2016 MediaTek Inc.
26 * struct mdp_ipi_init - for AP_MDP_INIT
38 * struct mdp_ipi_comm - for AP_MDP_PROCESS, AP_MDP_DEINIT
54 * struct mdp_ipi_comm_ack - for VPU_MDP_DEINIT_ACK, VPU_MDP_PROCESS_ACK
70 * struct mdp_config - configured for source/destination image
71 * @x : left
84 int32_t x; member
105 int32_t hflip; /* 1 will enable the flip */
106 int32_t vflip; /* 1 will enable the flip */
H A Dmtk_mdp_core.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2015-2016 MediaTek Inc.
12 #include <media/v4l2-ctrls.h>
13 #include <media/v4l2-device.h>
14 #include <media/v4l2-mem2mem.h>
15 #include <media/videobuf2-core.h>
16 #include <media/videobuf2-dma-contig.h>
22 #define MTK_MDP_MODULE_NAME "mtk-mdp"
34 * struct mtk_mdp_pix_align - alignment of image
48 * struct mtk_mdp_fmt - the driver's internal color format data
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/linux/arch/powerpc/include/uapi/asm/
H A Dps3fb.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
18 #define PS3FB_IOCTL_OFF _IO('r', 5) /* return to normal-flip */
19 #define PS3FB_IOCTL_FSEL _IOW('r', 6, int) /* blit and flip request */
28 __u32 xoff; /* margine x */
/linux/drivers/gpu/drm/loongson/
H A Dlsdc_crtc.c1 // SPDX-License-Identifier: GPL-2.0+
24 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_soft_reset()
50 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc1_soft_reset()
76 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_enable()
87 drm_warn(&ldev->base, "%s stall\n", lcrtc->base.name); in lsdc_crtc0_enable()
96 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_disable()
105 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc1_enable()
115 drm_warn(&ldev->base, "%s stall\n", lcrtc->base.name); in lsdc_crtc1_enable()
124 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc1_disable()
135 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_scan_pos()
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/linux/drivers/gpu/drm/xen/
H A Dxen_drm_front_kms.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
4 * Xen para-virtual DRM device
6 * Copyright (C) 2016-2018 EPAM Systems Inc.
28 * must be a bit more than IO time-out
40 struct xen_drm_front_drm_info *drm_info = fb->dev->dev_private; in fb_destroy()
43 if (drm_dev_enter(fb->dev, &idx)) { in fb_destroy()
44 xen_drm_front_fb_detach(drm_info->front_info, in fb_destroy()
60 struct xen_drm_front_drm_info *drm_info = dev->dev_private; in fb_create()
69 gem_obj = fb->obj[0]; in fb_create()
71 ret = xen_drm_front_fb_attach(drm_info->front_info, in fb_create()
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/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn21/
H A Ddcn21_hubp.c35 ctx->logger
39 hubp21->hubp_regs->reg
42 hubp21->base.ctx
46 hubp21->hubp_shift->field_name, hubp21->hubp_mask->field_name
49 * In DCN2.1, the non-double buffered version of the following 4 DLG registers are used in RTL.
63 * during prefetch period of a frame. The prefetch starts at a pre-determined
68 * or a sub-region of active using a new surface will be corrupted
69 * until the VM data returns at flip/mode change transitions
76 * Link to the ticket: http://ontrack-internal.amd.com/browse/DEDCN21-142
94 refcyc_per_vm_group_vblank > dlg_attr->refcyc_per_vm_group_vblank) in apply_DEDCN21_142_wa_for_hostvm_deadline()
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/linux/drivers/media/usb/gspca/
H A Dstk1135.c1 // SPDX-License-Identifier: GPL-2.0-or-later
45 /* -- read a register -- */
48 struct usb_device *dev = gspca_dev->dev; in reg_r()
51 if (gspca_dev->usb_err < 0) in reg_r()
58 gspca_dev->usb_buf, 1, in reg_r()
61 gspca_dbg(gspca_dev, D_USBI, "reg_r 0x%x=0x%02x\n", in reg_r()
62 index, gspca_dev->usb_buf[0]); in reg_r()
64 pr_err("reg_r 0x%x err %d\n", index, ret); in reg_r()
65 gspca_dev->usb_err = ret; in reg_r()
69 return gspca_dev->usb_buf[0]; in reg_r()
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/linux/drivers/gpu/drm/renesas/rz-du/
H A Drzg2l_du_crtc.c1 // SPDX-License-Identifier: GPL-2.0+
39 #define DU_DITR1_VSA(x) ((x) << 0) argument
40 #define DU_DITR1_VACTIVE(x) ((x) << 16) argument
43 #define DU_DITR2_VBP(x) ((x) << 0) argument
44 #define DU_DITR2_VFP(x) ((x) << 16) argument
47 #define DU_DITR3_HSA(x) ((x) << 0) argument
48 #define DU_DITR3_HACTIVE(x) ((x) << 16) argument
51 #define DU_DITR4_HBP(x) ((x) << 0) argument
52 #define DU_DITR4_HFP(x) ((x) << 16) argument
58 #define DU_PBCR0_PB_DEP(x) ((x) << 0) argument
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/linux/drivers/usb/serial/
H A Dkeyspan.c1 // SPDX-License-Identifier: GPL-2.0+
5 (C) Copyright (C) 2000-2001 Hugh Blemings <hugh@blemings.org>
6 (C) Copyright (C) 2002 Greg Kroah-Hartman <greg@kroah.com>
11 from Brian Warner's original Keyspan-PDA driver.
14 and Keyspan, Inc the manufacturers of the Keyspan USB-serial products.
79 /* Values used for baud rate calculation - device specific */
80 #define KEYSPAN_INVALID_BAUD_RATE (-1)
96 * usb-serial probe function.
100 /* Product IDs for the products supported, pre-renumeration */
115 * Product IDs post-renumeration. Note that the 28x and 28xb have the same
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/linux/drivers/sbus/char/
H A Ddisplay7seg.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* display7seg.c - Driver implementation for the 7-segment display
32 /* Solaris compatibility flag -
34 * documented driver features (ref Sun doc 806-0180-03).
38 * 1) Device ALWAYS reverts to OBP-specified FLIPPED mode
41 * FLIP bit
44 * omitting above features, set this parameter to non-zero.
51 MODULE_DESCRIPTION("7-Segment Display driver for Sun Microsystems CP1400/1500");
61 * Register block address- see header for details
62 * -----------------------------------------
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/linux/arch/arm/boot/dts/st/
H A Dste-href-stuib.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2012 ST-Ericsson AB
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "gpio-keys";
11 #address-cells = <1>;
12 #size-cells = <0>;
13 vdd-supply = <&ab8500_ldo_aux1_reg>;
14 pinctrl-names = "default";
15 pinctrl-0 = <&prox_stuib_mode>, <&hall_stuib_mode>;
33 stmpe1601: port-expander@40 {
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/linux/drivers/gpu/drm/arm/display/komeda/
H A Dkomeda_crtc.c1 // SPDX-License-Identifier: GPL-2.0
30 for_each_new_connector_in_state(crtc_st->state, conn, conn_st, i) { in komeda_crtc_get_color_config()
31 if (conn_st->crtc != crtc_st->crtc) in komeda_crtc_get_color_config()
34 conn_bpc = conn->display_info.bpc ? conn->display_info.bpc : 8; in komeda_crtc_get_color_config()
35 conn_color_formats &= conn->display_info.color_formats; in komeda_crtc_get_color_config()
53 if (!kcrtc_st->base.active) { in komeda_crtc_update_clock_ratio()
54 kcrtc_st->clock_ratio = 0; in komeda_crtc_update_clock_ratio()
58 pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000ULL; in komeda_crtc_update_clock_ratio()
61 kcrtc_st->clock_ratio = div64_u64(aclk << 32, pxlclk); in komeda_crtc_update_clock_ratio()
65 * komeda_crtc_atomic_check - build display output data flow
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/linux/drivers/tty/
H A Dtty_buffer.c1 // SPDX-License-Identifier: GPL-2.0
28 * Byte threshold to limit memory consumption for flip buffers.
29 * The actual memory limit is > 2x this amount.
41 #define TTY_BUFFER_PAGE (((PAGE_SIZE - sizeof(struct tty_buffer)) / 2) & ~TTYB_ALIGN_MASK)
44 * tty_buffer_lock_exclusive - gain exclusive access to buffer
45 * @port: tty port owning the flip buffer
48 * the buffer work and any pending flush from using the flip buffer. Data can
49 * continue to be added concurrently to the flip buffer from the driver side.
55 struct tty_bufhead *buf = &port->buf; in tty_buffer_lock_exclusive()
57 atomic_inc(&buf->priority); in tty_buffer_lock_exclusive()
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/linux/drivers/media/usb/gspca/stv06xx/
H A Dstv06xx_vv6410.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2001 Jean-Fredric Clere, Nikolas Zimmermann, Georg Acher
4 * Mark Cave-Ayland, Carlo E Prelz, Dick Streefland
9 * P/N 861050-0010: Sensor HDCS1000 ASIC STV0600
10 * P/N 861050-0020: Sensor Photobit PB100 ASIC STV0600-1 - QuickCam Express
11 * P/N 861055: Sensor ST VV6410 ASIC STV0610 - LEGO cam
12 * P/N 861075-0040: Sensor HDCS1000 ASIC
13 * P/N 961179-0700: Sensor ST VV6410 ASIC STV0602 - Dexxa WebCam USB
14 * P/N 861040-0000: Sensor ST VV6410 ASIC STV0610 - QuickCam Web
37 container_of(ctrl->handler, struct gspca_dev, ctrl_handler); in vv6410_s_ctrl()
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/linux/arch/x86/include/asm/
H A Ddma.h1 /* SPDX-License-Identifier: GPL-2.0 */
26 * controller 1: channels 0-3, byte operations, ports 00-1F
27 * controller 2: channels 4-7, word operations, ports C0-DF
29 * - ALL registers are 8 bits only, regardless of transfer size
30 * - channel 4 is not used - cascades 1 into 2.
31 * - channels 0-3 are byte - addresses/counts are for physical bytes
32 * - channels 5-7 are word - addresses/counts are for physical words
33 * - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries
34 * - transfer count loaded to registers is 1 less than actual count
35 * - controller 2 offsets are all even (2x offsets for controller 1)
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/linux/arch/mips/include/asm/
H A Ddma.h1 /* SPDX-License-Identifier: GPL-2.0 */
32 * controller 1: channels 0-3, byte operations, ports 00-1F
33 * controller 2: channels 4-7, word operations, ports C0-DF
35 * - ALL registers are 8 bits only, regardless of transfer size
36 * - channel 4 is not used - cascades 1 into 2.
37 * - channels 0-3 are byte - addresses/counts are for physical bytes
38 * - channels 5-7 are word - addresses/counts are for physical words
39 * - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries
40 * - transfer count loaded to registers is 1 less than actual count
41 * - controller 2 offsets are all even (2x offsets for controller 1)
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/linux/drivers/phy/rockchip/
H A Dphy-rockchip-usbdp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2021-2024 Rockchip Electronics Co., Ltd
9 #include <dt-bindings/phy/phy.h>
115 /* u2phy-grf */
119 /* usb-grf */
123 /* usbdpphy-grf */
129 /* vo-grf */
173 bool flip; member
179 bool hs; /* flag for high-speed */
206 /* voltage swing 0, pre-emphasis 0->3 */
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/linux/arch/powerpc/include/asm/
H A Ddma.h1 /* SPDX-License-Identifier: GPL-2.0 */
44 * controller 1: channels 0-3, byte operations, ports 00-1F
45 * controller 2: channels 4-7, word operations, ports C0-DF
47 * - ALL registers are 8 bits only, regardless of transfer size
48 * - channel 4 is not used - cascades 1 into 2.
49 * - channels 0-3 are byte - addresses/counts are for physical bytes
50 * - channels 5-7 are word - addresses/counts are for physical words
51 * - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries
52 * - transfer count loaded to registers is 1 less than actual count
53 * - controller 2 offsets are all even (2x offsets for controller 1)
[all …]
/linux/drivers/media/usb/gspca/gl860/
H A Dgl860.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * GSPCA by Jean-Francois Moine <http://moinejf.free.fr>
52 container_of(ctrl->handler, struct gspca_dev, ctrl_handler); in sd_s_ctrl()
55 switch (ctrl->id) { in sd_s_ctrl()
57 sd->vcur.brightness = ctrl->val; in sd_s_ctrl()
60 sd->vcur.contrast = ctrl->val; in sd_s_ctrl()
63 sd->vcur.saturation = ctrl->val; in sd_s_ctrl()
66 sd->vcur.hue = ctrl->val; in sd_s_ctrl()
69 sd->vcur.gamma = ctrl->val; in sd_s_ctrl()
72 sd->vcur.mirror = ctrl->val; in sd_s_ctrl()
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/linux/arch/alpha/include/asm/
H A Ddma.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * include/asm-alpha/dma.h
6 * use ISA-compatible dma. The only extension is support for high-page
7 * registers that allow to set the top 8 bits of a 32-bit DMA address.
31 * controller 1: channels 0-3, byte operations, ports 00-1F
32 * controller 2: channels 4-7, word operations, ports C0-DF
34 * - ALL registers are 8 bits only, regardless of transfer size
35 * - channel 4 is not used - cascades 1 into 2.
36 * - channels 0-3 are byte - addresses/counts are for physical bytes
37 * - channels 5-7 are word - addresses/counts are for physical words
[all …]

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