Home
last modified time | relevance | path

Searched +full:exynos5260 +full:- +full:clk (Results 1 – 7 of 7) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dsamsung,exynos5260-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynos5260-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos5260 SoC clock controller
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
13 - Tomasz Figa <tomasz.figa@gmail.com>
16 Expected external clocks, defined in DTS as fixed-rate clocks with a matching
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5260.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Exynos5260 SoC device tree source
9 #include <dt-bindings/clock/exynos5260-clk.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
14 compatible = "samsung,exynos5260", "samsung,exynos5";
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
34 #address-cells = <1>;
[all …]
H A Dexynos5260-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device
12 #include "exynos-pinctrl.h"
15 gpa0: gpa0-gpio-bank {
16 gpio-controller;
17 #gpio-cells = <2>;
19 interrupt-controller;
20 #interrupt-cells = <2>;
23 gpa1: gpa1-gpio-bank {
[all …]
/linux/arch/arm/mach-exynos/
H A Dexynos.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
15 #include <linux/soc/samsung/exynos-regs-pmu.h>
18 #include <asm/hardware/cache-l2x0.h>
33 .id = -1,
52 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") { in exynos_sysram_init()
64 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") { in exynos_sysram_init()
80 if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid")) in exynos_fdt_map_chipid()
88 iodesc.length = be32_to_cpu(reg[1]) - 1; in exynos_fdt_map_chipid()
114 * USE_DELAYED_RESET_ASSERTION should be set so the ARM CLK clock down
[all …]
/linux/drivers/devfreq/event/
H A Dexynos-ppmu.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * exynos_ppmu.c - Exynos PPMU (Platform Performance Monitoring Unit) support
5 * Copyright (c) 2014-2015 Samsung Electronics Co., Ltd.
11 #include <linux/clk.h>
20 #include <linux/devfreq-event.h>
22 #include "exynos-ppmu.h"
30 struct clk *clk; member
46 { "ppmu-event0-"#name, PPMU_PMNCNT0 }, \
47 { "ppmu-event1-"#name, PPMU_PMNCNT1 }, \
48 { "ppmu-event2-"#name, PPMU_PMNCNT2 }, \
[all …]
/linux/drivers/i2c/busses/
H A Di2c-exynos5.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * i2c-exynos5.c - Samsung Exynos5 I2C Controller Driver
18 #include <linux/clk.h>
184 struct clk *clk; /* operating clock */ member
185 struct clk *pclk; /* bus clock */
206 /* Version of HS-I2C Hardware */
211 * struct exynos_hsi2c_variant - platform specific HSI2C driver data
251 .compatible = "samsung,exynos5-hsi2c",
254 .compatible = "samsung,exynos5250-hsi2c",
257 .compatible = "samsung,exynos5260-hsi2c",
[all …]
/linux/drivers/pinctrl/samsung/
H A Dpinctrl-samsung.c1 // SPDX-License-Identifier: GPL-2.0+
3 // pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
18 #include <linux/clk.h>
32 #include "pinctrl-samsung.h"
42 { "samsung,pin-pud", PINCFG_TYPE_PUD },
43 { "samsung,pin-drv", PINCFG_TYPE_DRV },
44 { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN },
45 { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN },
46 { "samsung,pin-val", PINCFG_TYPE_DAT },
53 return pmx->nr_groups; in samsung_get_group_count()
[all …]