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Searched +full:extts +full:- +full:fifo (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/net/phy/
H A Dnxp-c45-tja11xx.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2021-2025 NXP
4 * Author: Radu Pirea <radu-nicolae.pirea@oss.nxp.com>
20 #include "nxp-c45-tja11xx.h"
197 #define NXP_C45_SKB_CB(skb) ((struct nxp_c45_skb_cb *)(skb)->cb)
292 bool (*get_extts)(struct nxp_c45_phy *priv, struct timespec64 *extts);
302 return phydev->drv->driver_data; in nxp_c45_get_data()
310 return phy_data->regmap; in nxp_c45_get_regmap()
319 if (reg_field->size == 0) { in nxp_c45_read_reg_field()
321 return -EINVAL; in nxp_c45_read_reg_field()
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H A Dmicrel.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (c) 2010-2013 Micrel, Inc.
129 * The value is calculated as following: (1/1000000)/((2^-32)/4)
135 * The value is calculated as following: (1/1000000)/((2^-32)/8)
420 /* Lock for Rx ts fifo */
560 const struct kszphy_type *type = phydev->drv->driver_data; in kszphy_config_intr()
564 if (type && type->interrupt_level_mask) in kszphy_config_intr()
565 mask = type->interrupt_level_mask; in kszphy_config_intr()
577 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in kszphy_config_intr()
640 return -EINVAL; in kszphy_setup_led()
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/linux/Documentation/devicetree/bindings/ptp/
H A Dfsl,ptp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
15 - enum:
16 - fsl,etsec-ptp
17 - fsl,fman-ptp-timer
18 - fsl,dpaa2-ptp
19 - items:
20 - const: pci1957,ee02
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/linux/arch/arm64/boot/dts/freescale/
H A Dqoriq-fman3-0.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright 2012-2015 Freescale Semiconductor Inc.
9 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
14 cell-index = <0>;
21 clock-names = "fmanclk";
22 fsl,qman-channel-range = <0x800 0x10>;
23 ptimer-handle = <&ptp_timer0>;
24 dma-coherent;
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H A Dfsl-ls1088a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1088A family SoC.
5 * Copyright 2017-2020 NXP
10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
26 #address-cells = <1>;
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H A Dfsl-ls208xa.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6 * Copyright 2017-2020 NXP
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
32 #address-cells = <1>;
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H A Dfsl-ls1028a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <1>;
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H A Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
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/linux/drivers/net/ethernet/intel/ice/
H A Dice_ptp.c1 // SPDX-License-Identifier: GPL-2.0
19 { TIME_SYNC, { 4, -1 }, { 0, 0 }},
20 { ONE_PPS, { -1, 5 }, { 0, 11 }},
29 { TIME_SYNC, { 4, -1 }, { 11, 0 }},
30 { ONE_PPS, { -1, 5 }, { 0, 9 }},
39 { ONE_PPS, { -1, 5 }, { 0, 1 }},
51 { SDP0, { -1, 0 }, { 0, 1 }},
52 { SDP1, { 1, -1 }, { 0, 0 }},
53 { SDP2, { -1, 2 }, { 0, 1 }},
54 { SDP3, { 3, -1 }, { 0, 0 }},
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/linux/drivers/net/ethernet/ti/
H A Dam65-cpts.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com
9 #include <linux/clk-provider.h>
23 #include "am65-cpts.h"
203 #define am65_cpts_write32(c, v, r) writel(v, &(c)->reg->r)
204 #define am65_cpts_read32(c, r) readl(&(c)->reg->r)
221 cpts->ts_add_val = (NSEC_PER_SEC / cpts->refclk_freq - 1) & 0x7; in am65_cpts_set_add_val()
223 am65_cpts_write32(cpts, cpts->ts_add_val, ts_add_val); in am65_cpts_set_add_val()
241 if (time_after(jiffies, event->tmo)) { in am65_cpts_purge_event_list()
242 list_del_init(&event->list); in am65_cpts_purge_event_list()
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