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12

/illumos-gate/usr/src/uts/sun/io/eri/
H A Deri_mac.h40 /* The Descriptor Ring base Addresses must be 2K-byte aligned */
45 * The transmit and receiver Descriptor Rings are organized as "wrap-around
47 * Each descriptor consists of two double-word entries: a control/status entry
58 * -----------------------------
60 * -----------------------------
70 #define ERI_TMD_BUFSIZE (0x7fff << 0) /* 0-14 : Tx Data buffer size */
71 /* valid values in range 0 - 17k */
72 #define ERI_TMD_CSSTART (0x3f << 15) /* 15-20 : Checksum start offset */
74 #define ERI_TMD_CSSTUFF (0xff << 21) /* 21-28 : Checksum stuff offset */
86 * TCP Header offset within Ethernet Packet:
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H A Deri.c27 * SunOS MT STREAMS ERI(PCI) 10/100 Mb Ethernet Device Driver
47 #include <sys/ethernet.h>
96 * Un-init Functions
256 *(bp->b_wptr) = 0; /* pad byte */ \
263 BUMP_InNUcast(erip, bp->b_rptr); \
264 type = get_ether_type(bp->b_rptr); \
267 end_offset = MBLKL(bp) - ETHERHEADER_SIZE; \
276 bp->b_wptr = bp->b_rptr + \
285 type = get_ether_type(bp->b_rptr); \
292 BUMP_InNUcast(erip, bp->b_rptr); \
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/illumos-gate/usr/src/uts/common/sys/
H A Dmac_ether.h34 * Ethernet MAC Plugin
42 * Ethernet-specific media types for use with MAC_PROP_MEDIA and
51 * 100BASE-X is a catchall term defined in 802.3. In 802.3 section
52 * 24.1.1 100BASE-X is used to cover the more specific 100BASE-TX and
53 * 100BASE-FX realized in copper and fiber. The PCS is shared between
59 * Note, previously there was never a 100BASE-TX value so some drivers
60 * would have returned this for 100BASE-TX.
64 * 1000BASE-X is a fiber catch all. This is for compatibility with the
65 * traditional ETHER_STAT_XCVR_INUSE 1000BASE-X value. More specific
201 * 200G Ethernet based on 50 GbE
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/illumos-gate/usr/src/boot/include/net/
H A Dethernet.h2 * Fundamental constants relating to ethernet.
12 * Some basic Ethernet constants.
14 #define ETHER_ADDR_LEN 6 /* length of an Ethernet address */
15 #define ETHER_TYPE_LEN 2 /* length of the Ethernet type field */
16 #define ETHER_CRC_LEN 4 /* length of the Ethernet CRC */
24 * Mbuf adjust factor to force 32-bit alignment of IP header.
27 * past the 14-byte Ethernet header.
36 ((ifp)->if_mtu + ETHER_HDR_LEN + \
41 * Ethernet-specific mbuf flags.
46 * Ethernet CRC32 polynomials (big- and little-endian verions).
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/illumos-gate/usr/src/uts/common/sys/nxge/
H A Dnxge_mac_hw.h35 /* -------------------------- From May's template --------------------------- */
64 /* -------------------------------------------------------------------------- */
87 * --- --- --- --- --- --- --- ---
112 * "xgc" as a possible value for the device property "phy-type"
236 (BMAC_ADDR_OFFSET_2 + (((port_num) - 2) * PORT_GT_1_OFFSET))
244 /* PCS address macros */
254 (PCS_ADDR_OFFSET_2 + (((port_num) - 2) * PORT_GT_1_OFFSET)))
511 /* x ranges from 0 to 6 (BMAC_MAX_ALT_ADDR_ENTRY - 1) */
616 #define XMAC_IPG_REG 0x080 /* Inter-Packet-Gap */
627 #define XRXMAC_HIST_CNT2_REG 0x128 /* 65-127 bytes frames */
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/illumos-gate/usr/src/cmd/cmd-inet/usr.sbin/snoop/
H A Dsnoop_ether.c43 #include <sys/ethernet.h>
71 /* Ethernet Bus */
103 { (uint_t)-1, 0, 0, 0, 0, 0, NULL, B_FALSE }
156 "RUNT (short packet - %d bytes)", in interpret_ether()
166 if (memcmp(&e->ether_dhost, &ether_broadcast, in interpret_ether()
169 else if (e->ether_dhost.ether_addr_octet[0] & 1) in interpret_ether()
172 ethertype = ntohs(e->ether_type); in interpret_ether()
180 len = elen - sizeof (struct ether_header); in interpret_ether()
187 "RUNT (short VLAN packet - %d bytes)", in interpret_ether()
201 len -= sizeof (struct ether_vlan_extinfo); in interpret_ether()
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/illumos-gate/usr/src/uts/common/io/myri10ge/firmware/
H A Dmyri10ge_mcp.h23 * Copyright 2007-2009 Myricom, Inc. All rights reserved.
61 /* 8-byte descriptor, exclusively used by NDIS drivers. */
177 #define MXGEFW_ETH_SEND_OFFSET(n) (MXGEFW_ETH_SEND(n) - MXGEFW_ETH_SEND_4)
229 /* command to bring ethernet interface up. Above parameters
234 /* command to bring ethernet interface down. No further sends
262 command return data = repetitions (MSH), 0.5-ms ticks (LSH)
275 or is equal to FF-FF-FF-FF-FF-FF
304 * the NIC to be able to receive maximum-sized packets.
309 /* data0 = number of slices n (0, 1, ..., n-1) to enable
312 * 1=use one MSI-X per queue.
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/illumos-gate/usr/src/uts/common/io/nxge/
H A Dnxge_mac.c55 * Ethernet broadcast address definition.
60 * Ethernet zero address definition.
141 * nxge_n2_10G_table is for 10G fiber or serdes on N2-NIU systems.
143 * on N2-NIU systems in 10G mode, but it uses its own table
180 nxge_1G_fiber_link_intr_start, /* PCS for 1G, so call fiber func */
253 * This function partitions nxgep->nxge_hw_p->niu_type (which may have
259 uint8_t portn = NXGE_GET_PORT_NUM(nxgep->function_num); in nxge_is_tn1010_phy()
261 if (((nxgep->nxge_hw_p->niu_type >> (NXGE_PORT_TYPE_SHIFT * portn)) in nxge_is_tn1010_phy()
271 * Figure out nxgep->mac.portmode from nxge.conf, OBP's device properties,
283 uint8_t portn = NXGE_GET_PORT_NUM(nxgep->function_num); in nxge_get_xcvr_type()
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/illumos-gate/usr/src/uts/common/io/e1000api/
H A De1000_regs.h3 Copyright (c) 2001-2015, Intel Corporation
38 #define E1000_CTRL 0x00000 /* Device Control - RW */
39 #define E1000_CTRL_DUP 0x00004 /* Device Control Duplicate (Shadow) - RW */
40 #define E1000_STATUS 0x00008 /* Device Status - RO */
41 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */
42 #define E1000_EERD 0x00014 /* EEPROM Read - RW */
43 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */
44 #define E1000_FLA 0x0001C /* Flash Access - RW */
45 #define E1000_MDIC 0x00020 /* MDI Control - RW */
46 #define E1000_MDICNFG 0x00E04 /* MDI Config - RW */
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H A De1000_ich8lan.c3 Copyright (c) 2001-2015, Intel Corporation
36 * 82562G-2 10/100 Network Connection
38 * 82562GT-2 10/100 Network Connection
40 * 82562V-2 10/100 Network Connection
41 * 82566DC-2 Gigabit Network Connection
43 * 82566DM-2 Gigabit Network Connection
50 * 82567LM-2 Gigabit Network Connection
51 * 82567LF-2 Gigabit Network Connection
52 * 82567V-2 Gigabit Network Connection
53 * 82567LF-3 Gigabit Network Connection
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H A De1000_defines.h3 Copyright (c) 2001-2015, Intel Corporation
94 #define E1000_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */
122 #define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
173 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
174 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
220 #define E1000_RCTL_SECRC 0x04000000 /* Strip Ethernet CRC */
263 #define E1000_CTRL_ASDE 0x00000020 /* Auto-speed detect enable */
265 #define E1000_CTRL_ILOS 0x00000080 /* Invert Loss-Of Signal */
341 #define E1000_STATUS_PCIX_MODE 0x00002000 /* PCI-X mode */
342 #define E1000_STATUS_PCIX_SPEED 0x0000C000 /* PCI-X bus speed */
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/illumos-gate/usr/src/uts/intel/io/dnet/
H A Ddnet.c29 * dnet -- DEC 21x4x
57 #include <sys/ethernet.h>
84 int dnetdebug = -1;
267 /* used for buffers which are NOT from ddi_dma_mem_alloc() - xmit side */
340 static char duplex_propname[] = "full-duplex"; /* Must agree with MII */
341 static char printsrom_propname[] = "print-srom";
391 * probe(9E) -- Determine if a device is present
483 case -1: in dnet_hack()
500 * attach(9E) -- Attach a device to the system
526 mutex_enter(&dnetp->intrlock); in dnet_attach()
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/illumos-gate/usr/src/uts/common/io/bge/
H A Dbge_mii.c23 * Copyright (c) 2010-2013, by Broadcom, Inc.
122 ASSERT(mutex_owned(bgep->genlock)); in bge_phydump()
142 /* reserved registers -- don't read these */ in bge_phydump()
174 * Basic low-level function to probe for a PHY
187 ASSERT(mutex_owned(bgep->genlock)); in bge_phy_probe()
230 * Basic low-level function to reset the PHY.
231 * Doesn't incorporate any special-case workarounds.
243 ASSERT(mutex_owned(bgep->genlock)); in bge_phy_reset()
254 * Set the PHY RESET bit, then wait up to 5 ms for it to self-clear in bge_phy_reset()
273 * Basic low-level function to powerdown the PHY, if supported
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/illumos-gate/usr/src/uts/common/io/
H A Dpcic.c39 * clock-frequency bus clock frequency
41 * need-mult-irq need status IRQ for each pair of sockets
42 * disable-audio don't route audio signal to speaker
191 static int pcic_maxinst = -1;
279 static int pcic_wait_insert_time = 5000000; /* In micro-seconds */
280 static int pcic_debounce_time = 200000; /* In micro-seconds */
283 pcic_socket_t *pcs; member
482 *result = anp->an_dip; in pcic_getinfo()
617 * This function is called when the system is single-threaded at high
628 pcicdev_t *pcic = anp->an_private; in pcic_quiesce()
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/illumos-gate/usr/src/uts/common/io/usb/
H A Dusbdevs1 $FreeBSD: head/sys/dev/usb/usbdevs 344959 2019-03-09 03:15:09Z bz $
4 /*-
5 * Copyright (c) 1998-2004 The NetBSD Foundation, Inc.
40 * USB.org publishes a VID list of USB-IF member companies at
93 vendor FUJITSUICL 0x0406 Fujitsu-ICL
169 vendor IODATA 0x04bb I-O Data
179 vendor LITEON 0x04ca Lite-On Technology
190 vendor ITUNERNET 0x04d8 I-Tuner Networks
253 vendor ETEK 0x056c e-TEK Labs
259 vendor YEDATA 0x057b Y-E Data
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/illumos-gate/usr/src/grub/grub-0.97/netboot/
H A De1000_hw.h4 Copyright(c) 1999 - 2003 Intel Corporation. All rights reserved.
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
291 /* MAC decode size is 128K - This is the size of BAR0 */
303 /* The sizes (in bytes) of a ethernet packet */
309 (MAXIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)
311 (MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)
355 * E1000_RAR_ENTRIES - 1 multicast addresses.
379 #define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
428 #define E1000_TXD_CMD_IFCS 0x02000000 /* Insert FCS (Ethernet CRC) */
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/illumos-gate/usr/src/data/hwdata/
H A Dusb.ids6 # http://www.linux-usb.org/usb-ids.html
7 # or send entries as patches (diff -u old new) in the
10 # http://www.linux-usb.org/usb.ids
13 # Date: 2025-04-01 20:34:02
20 # device device_name <-- single tab
21 # interface interface_name <-- two tabs
38 5301 GW-US54ZGL 802.11bg
54 145f NW-3100 802.11b/g 54Mbps Wireless Network Adapter [zd1211]
62 0200 TP-Link
81 120e ASI120MC-S Planetary Camera
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/illumos-gate/usr/src/uts/common/io/cardbus/
H A Dcardbus_cfg.c56 #include <sys/ethernet.h>
87 #define PCICFG_ROUND_UP(addr, gran) ((uintptr_t)((gran+addr-1)&(~(gran-1))))
88 #define PCICFG_ROUND_DOWN(addr, gran) ((uintptr_t)((addr) & ~(gran-1)))
253 { 0x200, "ethernet", 6 },
254 { 0x201, "token-ring", 6 },
258 { 0x380, "display", 9 }, /* other - for the Raptor Card */
274 { 0x800, "interrupt-controller", 3 },
275 { 0x801, "dma-controller", 3 },
284 { 0xc01, "access-bus", 4 },
287 { 0xc04, "fibre-channel", 6 },
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/illumos-gate/usr/src/uts/common/io/sfxge/common/
H A Defx_regs.h2 * Copyright (c) 2007-2015 Solarflare Communications Inc.
212 * PCIE PCS control and status register
218 * PCIE PCS control and status register
440 * IO-mapped indirect access address register
453 * IO-mapped indirect access data register
1038 * Driver scratch register [0-7]
1560 * Receive descriptor cache pre-fetch watermark register
3401 * Receive Ethernet filter table
3526 * Transmit Ethernet filter table
3844 /* Sub-fields of an RX flush completion event */
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H A Defx_regs_mcdi.h2 * Copyright 2008-2013 Solarflare Communications Inc. All rights reserved.
33 /* Power-on reset state */
55 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
58 /* The rest of these are firmware-defined */
66 /* Values to be written to the per-port status dword in shared
95 * | | \--- Response
96 * | \------- Error
97 * \------------------------------ Resync (always set)
152 * - To complete a shared memory request if XFLAGS_EVREQ was set
153 * - As a notification (link state, i2c event), controlled
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/illumos-gate/usr/src/uts/common/io/igb/
H A Digb_main.c23 * Copyright (c) 2007-2012 Intel Corporation. All rights reserved.
35 static char ident[] = "Intel 1Gb Ethernet";
36 static char igb_version[] = "igb 2.3.8-ish";
424 * igb_attach - driver attach
466 igb->dip = devinfo; in igb_attach()
467 igb->instance = instance; in igb_attach()
469 hw = &igb->hw; in igb_attach()
470 osdep = &igb->osdep; in igb_attach()
471 hw->back = osdep; in igb_attach()
472 osdep->igb = igb; in igb_attach()
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/illumos-gate/usr/src/uts/common/pcmcia/nexus/
H A Dpcmcia.c172 char *pcmcia_default_pm_mode = "parental-suspend-resume";
176 * disk tape pci sbus scsi token-ring isa keyboard display mouse
177 * audio ethernet timer memory parallel serial rtc nvram scanner
178 * floppy(controller) fddi isdn atm ide pccard video-in video-out
180 * network -> ethernet, token-ring, etc.
190 "video", /* no spec for video-out yet */
205 * The following should be 2^^n - 1
218 * XXX - See comments in cs.c
254 * non-DDI compliant functions are listed here
324 return (-1); in _init()
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/illumos-gate/usr/src/uts/common/
H A DMakefile.files30 # Copyright 2016 Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org>
426 # Stubs for the stand-alone linker/loader
455 # Driver (pseudo-driver) Modules
617 SPPPCOMP_OBJS += spppcomp.o spppcomp_mod.o deflate.o bsd-comp.o vjcompress.o \
1042 PCIIDE_OBJS += pci-ide.o
1593 # Inter-Process Communication (IPC) modules
1677 i386_FONT_SRC= ter-u16b
1799 PCS_OBJS += pcs.o
1967 # can't process the -Y I, flag.
1970 AS_INC_PATH += $(PRE_INC_PATH) $(INC_PATH) -I$(UTSBASE)/common
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/illumos-gate/usr/src/uts/common/io/qede/579xx/hsi/hw/
H A Dreg_addr_bb.h9 * or http://opensource.org/licenses/CDDL-1.0.
23 * Copyright 2014-2017 Cavium, Inc.
30 * at http://opensource.org/licenses/CDDL-1.0
84 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
85 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
86 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
87 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
89 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
91 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
99 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
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H A Dreg_addr_k2.h9 * or http://opensource.org/licenses/CDDL-1.0.
23 * Copyright 2014-2017 Cavium, Inc.
30 * at http://opensource.org/licenses/CDDL-1.0
84 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
85 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
86 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
87 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
89 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
91 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
99 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
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