| /freebsd/sys/contrib/device-tree/Bindings/regulator/ |
| H A D | rohm,bd71828-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/regulator/rohm,bd71828-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matti Vaittinen <mazziesaccount@gmail.com> 14 see Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml. 16 The regulator controller is represented as a sub-node of the PMIC node 25 "^LDO[1-7]$": 32 regulator-name: 33 pattern: "^ldo[1-7]$" [all …]
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| H A D | rohm,bd71847-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/regulator/rohm,bd71847-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matti Vaittinen <mazziesaccount@gmail.com> 15 Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml 20 Note that if BD71847 starts at RUN state you probably want to use 21 regulator-boot-on at least for BUCK5. LDO6 is supplied by it and it must 30 "^LDO[1-6]$": 37 regulator-name: [all …]
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| H A D | rohm,bd71837-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/regulator/rohm,bd71837-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matti Vaittinen <mazziesaccount@gmail.com> 15 Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml 20 Note that if BD71837 starts at RUN state you probably want to use 21 regulator-boot-on at least for BUCK6 and BUCK7 so that those are not 31 "^LDO[1-7]$": 38 regulator-name: [all …]
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| H A D | richtek,rtq2134-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/regulator/richtek,rtq2134-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - ChiYuan Huang <cy_huang@richtek.com> 13 The RTQ2134 is a multi-phase, programmable power management IC that 14 integrates with four high efficient, synchronous step-down converter cores. 17 https://www.richtek.com/assets/product_file/RTQ2134-QA/DSQ2134-QA-01.pdf 22 - richtek,rtq2134 31 "^buck[1-3]$": [all …]
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| H A D | maxim,max8973.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 13 - $ref: regulator.yaml# 18 - maxim,max8973 19 - maxim,max77621 21 junction-warn-millicelsius: 30 maxim,dvs-gpio: 33 GPIO which is connected to DVS pin of device. [all …]
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| H A D | rohm,bd71815-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/regulator/rohm,bd71815-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matti Vaittinen <mazziesaccount@gmail.com> 14 see Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml. 16 The regulator controller is represented as a sub-node of the PMIC node 33 regulator-name: 37 "^((ldo|buck)[1-5]|ldolpsr|ldodvref)$": 44 regulator-name: [all …]
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| H A D | max8973-regulator.txt | 5 - compatible: must be one of following: 8 - reg: the i2c slave address of the regulator. It should be 0x1b. 15 -maxim,externally-enable: boolean, externally control the regulator output 17 -maxim,enable-gpio: GPIO for enable control. If the valid GPIO is provided 19 -maxim,dvs-gpio: GPIO which is connected to DVS pin of device. 20 -maxim,dvs-default-state: Default state of GPIO during initialisation. 22 -maxim,enable-remote-sense: boolean, enable reote sense. 23 -maxim,enable-falling-slew-rate: boolean, enable falling slew rate. 24 -maxim,enable-active-discharge: boolean: enable active discharge. 25 -maxim,enable-frequency-shift: boolean, enable 9% frequency shift. [all …]
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| H A D | nxp,pca9450-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/regulator/nxp,pca9450-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Robin Gong <yibin.gong@nxp.com> 18 https://www.nxp.com/docs/en/data-sheet/PCA9450DS.pdf 28 - nxp,pca9450a 29 - nxp,pca9450b 30 - nxp,pca9450c 31 - nxp,pca9451a [all …]
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| H A D | microchip,mcp16502.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MCP16502 - High-Performance PMIC 10 - Andrei Simion <andrei.simion@microchip.com> 15 requiring Dynamic Voltage Scaling (DVS) with the use 16 of High-Performance mode (HPM). 22 lpm-gpios: 26 suspend-to-ram, keeping the PMIC into HIBERNATE mode. 31 lvin-supply: [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | rohm,bd71837-pmic.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mfd/rohm,bd71837-pmic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matti Vaittinen <mazziesaccount@gmail.com> 13 BD71837MWV is programmable Power Management ICs for powering single-core, 14 dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is optimized for low 18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica… 35 clock-names: 38 "#clock-cells": [all …]
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| H A D | rohm,bd71847-pmic.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mfd/rohm,bd71847-pmi [all...] |
| H A D | rk808.txt | 11 - compatible: "rockchip,rk805" 12 - compatible: "rockchip,rk808" 13 - compatible: "rockchip,rk809" 14 - compatible: "rockchip,rk817" 15 - compatible: "rockchip,rk818" 16 - reg: I2C slave address 17 - interrupts: the interrupt outputs of the controller. 18 - #clock-cells: from common clock binding; shall be set to 1 (multiple clock 19 outputs). See <dt-bindings/clock/rockchip,rk808.h> for clock IDs. 22 - clock-output-names: From common clock binding to override the [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/samsung/ |
| H A D | s5pv210-aries.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 32 reserved-memory { 33 #address-cells = <1>; 34 #size-cells = <1>; 38 compatible = "shared-dma-pool"; 39 no-map; 44 compatible = "shared-dma-pool"; [all …]
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| H A D | exynos4210-i9100.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung's Exynos4210 based Galaxy S2 (GT-I9100 version) device tree 11 /dts-v1/; 13 #include "exynos4412-ppmu-common.dtsi" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/input/linux-even [all...] |
| H A D | exynos4212-tab3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 11 #include "exynos4412-ppmu-common.dtsi" 12 #include "exynos-mfc-reserved-memory.dtsi" 13 #include <dt-bindings/clock/samsung,s2mps11.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/leds/common.h> 16 #include <dt-bindings/input/gpio-keys.h> 17 #include <dt-bindings/input/input.h> 18 #include <dt-bindings/interrupt-controller/irq.h> [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | pinctrl-max77620.txt | 6 Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt> 11 --------- [all...] |
| /freebsd/sys/contrib/device-tree/src/arm/rockchip/ |
| H A D | rk3288-tinker.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/clock/rockchip,rk808.h> 12 stdout-path = "serial2:115200n8"; 20 ext_gmac: external-gmac-clock { 21 compatible = "fixed-clock"; 22 #clock-cells = <0>; 23 clock-frequency = <125000000>; 24 clock-output-names = "ext_gmac"; 27 gpio-keys { [all …]
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| H A D | rk3288-veyron-jaq.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "rk3288-veyron-chromebook.dtsi" 11 #include "../cros-ec-sbs.dtsi" 15 compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4", 16 "google,veyron-jaq-rev3", "google,veyron-jaq-rev2", 17 "google,veyron-jaq-rev1", "google,veyron-jaq", 22 /* Jaq panel PWM must be >= 3%, so start non-zero brightness at 8 */ 23 brightness-levels = <8 255>; 24 num-interpolated-steps = <247>; [all …]
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| H A D | rk3288-veyron-fievel.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include "rk3288-veyron.dtsi" 10 #include "rk3288-veyron-analog-audio.dtsi" 14 compatible = "google,veyron-fievel-rev8", "google,veyron-fievel-rev7", 15 "google,veyron-fievel-rev6", "google,veyron-fievel-rev5", 16 "google,veyron-fievel-rev4", "google,veyron-fievel-rev3", 17 "google,veyron-fievel-rev2", "google,veyron-fievel-rev1", 18 "google,veyron-fievel-rev0", "google,veyron-fievel", 22 compatible = "regulator-fixed"; [all …]
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| H A D | rk3288-veyron-minnie.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include "rk3288-veyron-chromebook.dtsi" 10 #include "rk3288-veyron-broadcom-bluetooth.dtsi" 14 compatible = "google,veyron-minnie-rev4", "google,veyron-minnie-rev3", 15 "google,veyron-minnie-rev2", "google,veyron-minnie-rev1", 16 "google,veyron-minnie-rev0", "google,veyron-minnie", 19 volume_buttons: volume-buttons { 20 compatible = "gpio-keys"; 21 pinctrl-names = "default"; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | imx8mq-librem5-devkit.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 Purism SPC 6 /dts-v1/; 8 #include "dt-bindings/input/input.h" 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/leds/common.h> 11 #include "dt-bindings/pwm/pwm.h" 12 #include "dt-bindings/usb/pd.h" 17 compatible = "purism,librem5-devkit", "fsl,imx8mq"; 19 backlight_dsi: backlight-dsi { [all …]
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| H A D | imx8mm-kontron-osm-s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 11 model = "Kontron OSM-S i.MX8MM (N802X SOM)"; 12 compatible = "kontron,imx8mm-osm-s", "fsl,imx8mm"; 30 stdout-path = &uart3; 33 reg_vdd_carrier: regulator-vdd-carrier { 34 compatible = "regulator-fixed"; 35 pinctrl-names = "default"; 36 pinctrl-0 = <&pinctrl_reg_vdd_carrier>; [all …]
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| H A D | imx8mp-navqp.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/leds/common.h> 15 compatible = "emcraft,imx8mp-navqp", "fsl,imx8mp"; 18 stdout-path = &uart2; 22 compatible = "gpio-leds"; 23 pinctrl-names = "default"; 24 pinctrl-0 = <&pinctrl_gpio_led>; 26 led-0 { [all …]
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| H A D | imx8mm-venice-gw7904.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/linux-event-codes.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/phy/phy-imx8-pcie.h> 17 compatible = "gateworks,imx8mm-gw7904", "fsl,imx8mm"; 20 stdout-path = &uart2; 28 gpio-keys { 29 compatible = "gpio-keys"; [all …]
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| H A D | imx8mm-venice-gw7903.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/linux-event-codes.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/phy/phy-imx8-pcie.h> 17 compatible = "gw,imx8mm-gw7903", "fsl,imx8mm"; 25 stdout-path = &uart2; 33 gpio-keys { 34 compatible = "gpio-keys"; [all …]
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