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/linux/Documentation/devicetree/bindings/display/
H A Ddp-aux-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dp-aux-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DisplayPort AUX bus
10 - Douglas Anderson <dianders@chromium.org>
14 are hooked up to them. This is the DP AUX bus. Over the DP AUX bus
16 particular, DP sinks support DDC over DP AUX which allows tunneling
17 a standard I2C DDC connection over the AUX channel.
19 To model this relationship, DP sinks should be placed as children
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/linux/include/drm/display/
H A Ddrm_dp_aux_bus.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * The DP AUX bus is used for devices that are connected over a DisplayPort
6 * AUX bus. The devices on the far side of the bus are referred to as
17 * struct dp_aux_ep_device - Main dev structure for DP AUX endpoints
19 * This is used to instantiate devices that are connected via a DP AUX
20 * bus. Usually the device is a panel, but conceivable other devices could
26 /** @aux: Pointer to the aux bus */
27 struct drm_dp_aux *aux; member
47 int of_dp_aux_populate_bus(struct drm_dp_aux *aux,
48 int (*done_probing)(struct drm_dp_aux *aux));
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/linux/Documentation/devicetree/bindings/display/panel/
H A Dpanel-edp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-edp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Probeable (via DP AUX / EDID) eDP Panels with simple poweron sequences
10 - Douglas Anderson <dianders@chromium.org>
14 to a Embedded DisplayPort AUX bus (see display/dp-aux-bus.yaml) without
17 board, either for second-sourcing purposes or to support multiple SKUs
21 represented under the DP AUX bus. This means that we can use any
22 information provided by the DP AUX bus (including the EDID) to identify
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/linux/Documentation/devicetree/bindings/display/bridge/
H A Danalogix,anx7625.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Xin Ji <xji@analogixsemi.com>
14 The ANX7625 is an ultra-low power 4K Mobile HD Transmitter
28 enable-gpios:
32 reset-gpios:
36 vdd10-supply:
39 vdd18-supply:
42 vdd33-supply:
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H A Dps8640.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Boichat <drinkcat@chromium.org>
13 The PS8640 is a low power MIPI-to-eDP video format converter supporting
28 powerdown-gpios:
32 reset-gpios:
36 vdd12-supply:
39 vdd33-supply:
42 aux-bus:
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H A Dcdns,mhdp8546.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Swapnil Jakhade <sjakhade@cadence.com>
11 - Yuti Amonkar <yamonkar@cadence.com>
16 - cdns,mhdp8546
17 - ti,j721e-mhdp8546
22 - description:
24 The AUX and PMA registers are not part of this range, they are instead
26 - description:
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H A Dti,sn65dsi86.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Douglas Anderson <dianders@chromium.org>
23 enable-gpios:
27 suspend-gpios:
31 no-hpd:
37 vccio-supply:
40 vpll-supply:
43 vcca-supply:
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/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,dp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Jitao shi <jitao.shi@mediatek.com>
14 MediaTek DP and eDP are different hardwares and there are some features
17 In addition, We just need to enable the power domain of DP, so the clock
18 of DP is generated by itself and we are not using other PLL to generate
24 - mediatek,mt8188-dp-tx
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/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra124-sor.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-sor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 and DP outputs.
19 pattern: "^sor@[0-9a-f]+$"
23 - enum:
24 - nvidia,tegra124-sor
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H A Dnvidia,tegra124-dpaux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra DisplayPort AUX Interface
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
18 When configured for DisplayPort AUX operation, the DPAUX controller
20 AUX channel.
24 pattern: "^dpaux@[0-9a-f]+$"
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/linux/drivers/gpu/drm/display/
H A Ddrm_dp_helper.c61 struct drm_dp_aux *aux; member
67 * DOC: dp helpers
70 * levels to deal with Display Port sink devices and related things like DP aux
71 * channel transfers, EDID reading over DP aux channels, decoding certain DPCD
75 /* Helpers for DP link training */
78 return link_status[r - DP_LANE0_1_STATUS]; in dp_link_status()
152 /* DP 2.0 128b/132b */
166 /* DP 2.0 errata for 128b/132b */
186 /* DP 2.0 errata for 128b/132b */
202 /* DP 2.0 errata for 128b/132b */
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/linux/drivers/gpu/drm/msm/dp/
H A Ddp_display.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
33 MODULE_PARM_DESC(psr_enabled, "enable PSR for eDP and DP displays");
89 struct drm_dp_aux *aux; member
190 { .compatible = "qcom,sa8775p-dp", .data = &msm_dp_desc_sa8775p },
191 { .compatible = "qcom,sc7180-dp", .data = &msm_dp_desc_sc7180 },
192 { .compatible = "qcom,sc7280-dp", .data = &msm_dp_desc_sc7280 },
193 { .compatible = "qcom,sc7280-edp", .data = &msm_dp_desc_sc7280 },
194 { .compatible = "qcom,sc8180x-dp", .data = &msm_dp_desc_sc8180x },
195 { .compatible = "qcom,sc8180x-edp", .data = &msm_dp_desc_sc8180x },
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/linux/drivers/gpu/drm/bridge/
H A Dti-sn65dsi86.c1 // SPDX-License-Identifier: GPL-2.0
134 * struct ti_sn65dsi86 - Platform data for ti-sn65dsi86 driver.
135 * @bridge_aux: AUX-bus sub device for MIPI-to-eDP bridge functionality.
136 * @gpio_aux: AUX-bus sub device for GPIO controller functionality.
137 * @aux_aux: AUX-bus sub device for eDP AUX channel functionality.
138 * @pwm_aux: AUX-bus sub device for PWM controller functionality.
142 * @aux: Our aux channel.
153 * @ln_polrs: Value for the 4-bit LN_POLRS field of SN_ENH_FRAME_REG.
154 * @comms_enabled: If true then communication over the aux channel is enabled.
159 * serves double-duty of keeping track of the direction and
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/linux/drivers/gpu/drm/mediatek/
H A Dmtk_dp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2019-2022 MediaTek Inc.
18 #include <linux/arm-smccc.h>
23 #include <linux/media-bus-format.h>
24 #include <linux/nvmem-consumer.h>
33 #include <sound/hdmi-codec.h>
118 struct drm_dp_aux aux; member
402 .name = "mtk-dp-registers",
415 ret = regmap_read(mtk_dp->regs, offset, &read_val); in mtk_dp_read()
417 dev_err(mtk_dp->dev, "Failed to read register 0x%x: %d\n", in mtk_dp_read()
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/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sc7280-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7280-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
17 $ref: /schemas/display/msm/mdss-common.yaml#
21 const: qcom,sc7280-mdss
25 - description: Display AHB clock from gcc
26 - description: Display AHB clock from dispcc
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/linux/arch/arm64/boot/dts/renesas/
H A Dr8a779g3-sparrow-hawk.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the R-Car V4H ES3.0 Sparrow Hawk board
17 * for Capture (Aux/Mic)
20 * CONN3 (HeadSet) ---+----> MSIOF1
22 * CONN4 AUX ---------+ on/off (A)
28 * > amixer set "Aux" on ^
29 * > amixer set "Aux" 80% | (A)
30 * > amixer set "Mixin Left Aux Left" on |
31 * > amixer set "Mixin Right Aux Right" on v
36 * > arecord -f cd xxx.wav
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H A Dgray-hawk-single.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
6 * Copyright (C) 2024-2025 Glider bv
11 * Because R-Car V4M has only 1 SSI, it cannot handle both Playback/Capture
28 #include <dt-bindings/gpio/gpio.h>
29 #include <dt-bindings/input/input.h>
30 #include <dt-bindings/leds/common.h>
31 #include <dt-bindings/media/video-interfaces.h>
35 compatible = "renesas,gray-hawk-single";
49 can_transceiver0: can-phy0 {
51 #phy-cells = <0>;
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsc8280xp.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,dispcc-sc8280xp.h>
8 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
9 #include <dt-bindings/clock/qcom,gpucc-sc8280xp.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sc8280xp-camcc.h>
12 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
13 #include <dt-bindings/interconnect/qcom,osm-l3.h>
14 #include <dt-bindings/interconnect/qcom,sc8280xp.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
[all …]
H A Dsc8180x.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2020-2023, Linaro Limited
7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
9 #include <dt-bindings/clock/qcom,gcc-sc8180x.h>
10 #include <dt-bindings/clock/qcom,gpucc-sm8150.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/clock/qcom,sc8180x-camcc.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-extra.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "rk3588-base.dtsi"
7 #include "rk3588-extra-pinctrl.dtsi"
10 hdmi1_sound: hdmi1-sound {
11 compatible = "simple-audio-card";
12 simple-audio-card,format = "i2s";
13 simple-audio-card,mclk-fs = <128>;
14 simple-audio-card,name = "hdmi1";
17 simple-audio-card,codec {
18 sound-dai = <&hdmi1>;
[all …]
H A Drk3588-rock-5-itx.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/pinctrl/rockchip.h>
13 #include <dt-bindings/pwm/pwm.h>
14 #include <dt-bindings/soc/rockchip,vop2.h>
15 #include "dt-bindings/usb/pd.h"
20 compatible = "radxa,rock-5-itx", "rockchip,rk3588";
[all …]
/linux/drivers/platform/x86/
H A Dapple-gmux.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2010-2012 Andreas Heider <andreas@meetr.de>
19 #include <linux/apple-gmux.h>
32 * A `Lattice XP2`_ on pre-retinas, a `Renesas R4F2113`_ on pre-T2 retinas.
41 * dual GPUs but no built-in display.)
43 * gmux is connected to the LPC bus of the southbridge. Its I/O ports are
45 * to access a pre-retina gmux are infixed ``_pio_``, those for a pre-T2
54 * https://www.nxp.com/docs/en/data-sheet/PCAL6524.pdf
112 return inb(gmux_data->iostart + port); in gmux_pio_read8()
118 outb(val, gmux_data->iostart + port); in gmux_pio_write8()
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/linux/drivers/net/ethernet/broadcom/
H A Db44.c9 * Copyright (C) 2013 Hauke Mehrtens <hauke@hauke-m.de>
30 #include <linux/dma-mapping.h>
56 * and dev->tx_timeout() should be called to fix the problem
69 #define B44_DEF_TX_RING_PENDING (B44_TX_RING_SIZE - 1)
74 (B44_TX_RING_SIZE - (BP)->tx_pending)
76 (((BP)->tx_cons <= (BP)->tx_prod) ? \
77 (BP)->tx_cons + (BP)->tx_pending - (BP)->tx_prod : \
78 (BP)->tx_cons - (BP)->tx_prod - TX_RING_GAP(BP))
79 #define NEXT_TX(N) (((N) + 1) & (B44_TX_RING_SIZE - 1))
100 static int b44_debug = -1; /* -1 == use B44_DEF_MSG_ENABLE as value */
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/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
[all …]
H A Dtegra186-p3509-0000+p3636-0001.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/mfd/max77620.h>
12 compatible = "nvidia,p3509-0000+p3636-0001", "nvidia,tegra186";
30 stdout-path = "serial0:115200n8";
41 phy-reset-gpios = <&gpio_aon TEGRA186_AON_GPIO(AA, 6) GPIO_ACTIVE_LOW>;
42 phy-handle = <&phy>;
43 phy-mode = "rgmii-id";
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