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/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dqcom,dispcc-sdm845.h27 #define DISP_CC_MDSS_PCLK1_CLK 17 macro
H A Dqcom,dispcc-sm8150.h48 #define DISP_CC_MDSS_PCLK1_CLK 38 macro
H A Dqcom,dispcc-sm8250.h48 #define DISP_CC_MDSS_PCLK1_CLK 38 macro
H A Dqcom,dispcc-sm8350.h48 #define DISP_CC_MDSS_PCLK1_CLK 38 macro
H A Dqcom,x1e80100-dispcc.h75 #define DISP_CC_MDSS_PCLK1_CLK 65 macro
H A Dqcom,dispcc-sc8280xp.h77 #define DISP_CC_MDSS_PCLK1_CLK 67 macro
H A Dqcom,sm8450-dispcc.h77 #define DISP_CC_MDSS_PCLK1_CLK 67 macro
H A Dqcom,sm8550-dispcc.h78 #define DISP_CC_MDSS_PCLK1_CLK 68 macro
H A Dqcom,sm8650-dispcc.h78 #define DISP_CC_MDSS_PCLK1_CLK 68 macro
H A Dqcom,sm8750-dispcc.h84 #define DISP_CC_MDSS_PCLK1_CLK 72 macro
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Dqcom,sdm845-mdss.yaml228 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
H A Dqcom,sm8250-mdss.yaml289 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
H A Dqcom,sm8450-mdss.yaml303 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
H A Dqcom,sm8150-mdss.yaml286 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
H A Dqcom,sm8550-mdss.yaml293 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
H A Dqcom,sm8750-mdss.yaml318 <&disp_cc_mdss_pclk1_clk>,
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdm670.dtsi1983 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
H A Dsar2130p.dtsi2321 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
H A Dsm8350.dtsi3055 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
H A Dsc8180x.dtsi3172 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
H A Dsm8150.dtsi4063 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
H A Dsm8450.dtsi3605 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
H A Dsdm845.dtsi4808 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
H A Dsm8250.dtsi4953 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
H A Dsm8550.dtsi3929 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,

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