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/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-npcm750-pincfg-evb.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 pin8_input: pin8-input {
8 bias-disable;
9 input-enable;
11 pin9_output_high: pin9-output-high {
13 bias-disable;
14 output-high;
16 pin10_input: pin10-input {
18 bias-disable;
19 input-enable;
[all …]
H A Dnuvoton-npcm750-runbmc-olympus-pincfg.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 gpio0ol_pins: gpio0ol-pins {
8 bias-disable;
9 output-low;
11 gpio1ol_pins: gpio1ol-pins {
13 bias-disable;
14 output-low;
16 gpio2ol_pins: gpio2ol-pins {
18 bias-disable;
19 output-low;
[all …]
H A Dnuvoton-npcm730-kudo.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
5 #include "nuvoton-npcm730.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
41 stdout-path = &serial3;
48 iio-hwmon {
49 compatible = "iio-hwmon";
50 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
55 compatible = "nuvoton,npcm750-jtag-master";
56 #address-cells = <1>;
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dpincfg-node.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
21 bias-disable:
23 description: disable any pin bias
25 bias-high-impedance:
27 description: high impedance mode ("third-state", "floating")
29 bias-bus-hold:
[all …]
H A Dsprd,pinctrl.txt16 of them, so we can not make every Spreadtrum-special configuration
35 - input-enable
36 - input-disable
37 - output-high
38 - output-low
39 - bias-pull-up
40 - bias-pull-down
46 and set the pin sleep related configuration as "input-enable", which
54 "sprd,sleep-mode" property to set pin sleep mode.
62 - compatible: "sprd,<soc>-pinctrl"
[all …]
H A Dnvidia,tegra-pinmux-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra-pinmux-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
14 Please refer to pinctrl-bindings.txt in this directory for details of the
22 pin configuration parameters, such as pull-up, tristate, drive strength,
46 $ref: /schemas/types.yaml#/definitions/string-array
57 description: Pull-down/up setting to apply to the pin.
[all …]
H A Dsprd,sc9860-pinctrl.txt7 - compatible: Must be "sprd,sc9860-pinctrl".
8 - reg: The register address of pin controller device.
9 - pins : An array of strings, each string containing the name of a pin.
12 - function: A string containing the name of the function, values must be
14 - drive-strength: Drive strength in mA. Supported values: 2, 4, 6, 8, 10,
16 - input-schmitt-disable: Enable schmitt-trigger mode.
17 - input-schmitt-enable: Disable schmitt-trigger mode.
18 - bias-disable: Disable pin bias.
19 - bias-pull-down: Pull down on pin.
20 - bias-pull-up: Pull up on pin. Supported values: 20000 for pull-up resistor
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8996-sony-xperia-tone.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
18 /delete-node/ &adsp_mem;
19 /delete-node/ &slpi_mem;
20 /delete-node/ &venus_mem;
21 /delete-node/ &gpu_mem;
[all …]
H A Dmsm8916-samsung-gt510.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8916-samsung-gt5-common.dtsi"
10 chassis-type = "tablet";
12 speaker_codec: audio-codec {
14 sdmode-gpios = <&tlmm 55 GPIO_ACTIVE_HIGH>;
15 #sound-dai-cells = <0>;
16 pinctrl-0 = <&audio_sdmode_default>;
17 pinctrl-names = "default";
21 compatible = "clk-pwm";
[all …]
H A Dmsm8916-samsung-gt58.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8916-samsung-gt5-common.dtsi"
10 chassis-type = "tablet";
12 reg_5p4v: regulator-5p4v {
13 compatible = "regulator-fixed";
14 regulator-name = "vlcd_5p4v";
15 regulator-min-microvolt = <5400000>;
16 regulator-max-microvolt = <5400000>;
19 enable-active-high;
[all …]
H A Dsc7180-trogdor.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/gpio-keys.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/sc7180-lpass.h>
16 #include "sc7180-firmware-tfa.dtsi"
22 thermal-zones {
23 charger_thermal: charger-thermal {
[all …]
H A Dmsm8939-samsung-a7.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8939-pm8916.dtsi"
6 #include "msm8916-modem-qdsp6.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/sound/apq8016-lpass.h>
16 chassis-type = "handset";
25 stdout-path = "serial0";
[all …]
/linux/drivers/media/dvb-frontends/
H A Dm88ds3103.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
19 * enum m88ds3103_ts_mode - TS connection mode
47 * struct m88ds3103_platform_data - Platform data for the m88ds3103 driver
52 * @ts_clk_pol: TS clk polarity. 1-active at falling edge; 0-active at rising
59 * @lnb_hv_pol: LNB H/V pin polarity. 0: pin high set to VOLTAGE_18, pin low to
60 * set VOLTAGE_13. 1: pin high set to VOLTAGE_13, pin low to set VOLTAGE_18.
61 * @lnb_en_pol: LNB enable pin polarity. 0: pin high to disable, pin low to
62 * enable. 1: pin high to enable, pin low to disable.
88 * struct m88ds3103_config - m88ds3102 configuration
98 * 1-active at falling edge; 0-active at rising edge.
[all …]
/linux/scripts/coccinelle/api/
H A Dstring_choices.cocci1 // SPDX-License-Identifier: GPL-2.0-only
5 // Options: --no-includes --include-headers
14 - ((E == 1) ? "" : "s")
17 - ((E > 1) ? "s" : "")
38 @str_up_down depends on patch disable neg_if_exp@
41 - ((E) ? "up" : "down")
44 @str_up_down_r depends on !patch disable neg_if_exp@
57 @str_down_up depends on patch disable neg_if_exp@
60 - ((E) ? "down" : "up")
63 @str_down_up_r depends on !patch disable neg_if_exp@
[all …]
/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp-zc1751-xm015-dc1.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm015-dc1
5 * (C) Copyright 2015 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/phy/phy.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
20 model = "ZynqMP zc1751-xm015-dc1 RevA";
[all …]
H A Dzynqmp-zc1751-xm019-dc5.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm019-dc5
5 * (C) Copyright 2015 - 2021, Xilinx, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
19 model = "ZynqMP zc1751-xm019-dc5 RevA";
20 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
33 stdout-path = "serial0:115200n8";
[all …]
/linux/arch/arm/boot/dts/xilinx/
H A Dzynq-zc702.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
12 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
31 stdout-path = "serial0:115200n8";
34 gpio-keys {
35 compatible = "gpio-keys";
37 switch-14 {
[all …]
H A Dzynq-zc706.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
30 stdout-path = "serial0:115200n8";
34 compatible = "usb-nop-xceiv";
35 #phy-cells = <0>;
40 ps-clk-frequency = <33333333>;
45 phy-mode = "rgmii-id";
[all …]
/linux/arch/arm64/boot/dts/microchip/
H A Dsparx5_pcb134_board.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 gpio-restart {
11 compatible = "gpio-restart";
16 i2c0_imux: i2c-mux-0 {
17 compatible = "i2c-mux-pinctrl";
18 #address-cells = <1>;
19 #size-cells = <0>;
20 i2c-parent = <&i2c0>;
23 i2c0_emux: i2c-mux-1 {
[all …]
/linux/drivers/pwm/
H A Dpwm-dwc-core.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2020 Intel Corporation
22 #include "pwm-dwc.h"
44 u32 high; in __dwc_pwm_configure_timer() local
48 * Calculate width of low and high period in terms of input clock in __dwc_pwm_configure_timer()
52 tmp = DIV_ROUND_CLOSEST_ULL(state->duty_cycle, dwc->clk_ns); in __dwc_pwm_configure_timer()
54 return -ERANGE; in __dwc_pwm_configure_timer()
55 low = tmp - 1; in __dwc_pwm_configure_timer()
57 tmp = DIV_ROUND_CLOSEST_ULL(state->period - state->duty_cycle, in __dwc_pwm_configure_timer()
58 dwc->clk_ns); in __dwc_pwm_configure_timer()
[all …]
/linux/arch/m68k/kernel/
H A Dsun3-head.S1 /* SPDX-License-Identifier: GPL-2.0 */
8 #include <asm/sun3-head.h>
13 CACHES_OFF = 0x00000008 | actually a clear and disable --m
38 /* Firstly, disable interrupts and set up function codes. */
48 /* map everything the bootloader left us into high memory, clean up the
63 /* Disable caches and jump to high code. */
65 movc %d0, %cacr | is this the right value? (yes --m)
68 /* Following code executes at high addresses (0xE000xxx). */
72 /* Point MSP at an invalid page to trap if it's used. --m */
75 moveq #-1,%d0
/linux/Documentation/admin-guide/pm/
H A Dintel-speed-select.rst1 .. SPDX-License-Identifier: GPL-2.0
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
19 dynamically without pre-configuring via BIOS setup options. This dynamic
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
38 # cd tools/power/x86/intel-speed-select/
43 ------------
47 # intel-speed-select --help
49 The top-level help describes arguments and features. Notice that there is a
[all …]
/linux/drivers/net/ethernet/amd/
H A D7990.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * 7990.h -- LANCE ethernet IC generic routines.
11 * in particular a2065.[ch]. The AMD C-LANCE datasheet was also helpful.
32 * too long (and overflow the RAM on shared-memory cards like the HP LANCE.
41 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
42 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
53 volatile unsigned char rmd1_hadr; /* high address of packet */
63 volatile unsigned char tmd1_hadr; /* high address of packet */
74 volatile unsigned short mode; /* Pre-set mode (reg. 15) */
80 volatile unsigned short rx_len; /* receive len and high addr */
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q-apalis-ixora-v1.2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2014-2022 Toradex
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
14 #include "imx6qdl-apalis.dtsi"
18 compatible = "toradex,apalis_imx6q-ixora-v1.2", "toradex,apalis_imx6q",
30 stdout-path = "serial0:115200n8";
34 compatible = "gpio-leds";
[all …]
/linux/drivers/pinctrl/
H A Dpinctrl-at91.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Parallel I/O Controller (PIO) - System peripherals registers.
13 #define PIO_PDR 0x04 /* Disable Register */
16 #define PIO_ODR 0x14 /* Output Disable Register */
19 #define PIO_IFDR 0x24 /* Glitch Input Filter Disable */
26 #define PIO_IDR 0x44 /* Interrupt Disable Register */
29 #define PIO_MDER 0x50 /* Multi-driver Enable Register */
30 #define PIO_MDDR 0x54 /* Multi-driver Disable Register */
31 #define PIO_MDSR 0x58 /* Multi-driver Status Register */
32 #define PIO_PUDR 0x60 /* Pull-up Disable Register */
[all …]

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