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Searched +full:ce4100 +full:- +full:ioapic (Results 1 – 6 of 6) sorted by relevance

/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dintel,ce4100-ioapic.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-ioapic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rahul Tanwar <rtanwar@maxlinear.com>
18 from internal sources and from an external I/O APIC (ioapic).
22 Many of the Intel's generic devices like hpet, ioapic, lapic have
23 the ce4100 name in their compatible property names because they
24 first appeared in CE4100 SoC.
28 [1] https://pdos.csail.mit.edu/6.828/2008/readings/ia32/IA32-3A.pdf
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H A Dintel,ce4100-lapic.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-lapic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rahul Tanwar <rtanwar@maxlinear.com>
18 from internal sources and from an external I/O APIC (ioapic).
22 Many of the Intel's generic devices like hpet, ioapic, lapic have
23 the ce4100 name in their compatible property names because they
24 first appeared in CE4100 SoC.
28 [1] https://pdos.csail.mit.edu/6.828/2008/readings/ia32/IA32-3A.pdf
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/linux/arch/x86/platform/ce4100/
H A Dfalconfalls.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * CE4100 on Falcon Falls
7 /dts-v1/;
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "intel,ce4100";
27 #address-cells = <1>;
28 #size-cells = <1>;
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/linux/arch/x86/kernel/
H A Ddevicetree.c1 // SPDX-License-Identifier: GPL-2.0
42 * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
45 { .compatible = "intel,ce4100-cp", },
69 prop = of_get_property(np, "bus-range", NULL); in pcibios_get_phb_of_node()
73 if (bus->number == bus_min) in pcibios_get_phb_of_node()
93 return -EINVAL; in x86_of_pci_irq_enable()
94 dev->irq = virq; in x86_of_pci_irq_enable()
116 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet"); in dtb_setup_hpet()
153 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic"); in dtb_lapic_setup()
170 pic_mode = !of_property_read_bool(dn, "intel,virtual-wire-mode"); in dtb_lapic_setup()
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/linux/drivers/tty/serial/8250/
H A D8250_ce4100.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Intel CE4100 platform specific setup code
12 #include <asm/ce4100.h>
21 offset = offset << p->regshift; in mem_serial_in()
22 return readl(p->membase + offset); in mem_serial_in()
32 * errata number 9 in Errata - B step.
58 offset <<= p->regshift; in ce4100_mem_serial_out()
59 writel(value, p->membase + offset); in ce4100_mem_serial_out()
68 * PCI memmaped driver hangs the IOAPIC. in ce4100_serial_fixup()
70 if (up->iotype != UPIO_MEM32) { in ce4100_serial_fixup()
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/linux/arch/x86/kernel/apic/
H A Dvector.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Local APIC related interfaces to support IOAPIC, MSI, etc.
78 info->mask = mask; in init_irq_alloc_info()
94 while (irqd->parent_data) in apic_chip_data()
95 irqd = irqd->parent_data; in apic_chip_data()
97 return irqd->chip_data; in apic_chip_data()
104 return apicd ? &apicd->hw_irq_cfg : NULL; in irqd_cfg()
119 INIT_HLIST_NODE(&apicd->clist); in alloc_apic_chip_data()
135 apicd->hw_irq_cfg.vector = vector; in apic_update_irq_cfg()
136 apicd->hw_irq_cfg.dest_apicid = apic->calc_dest_apicid(cpu); in apic_update_irq_cfg()
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