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Searched +full:c900 +full:- +full:plic (Results 1 – 4 of 4) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dsifive,plic-1.0.0.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/interrupt-controlle
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/freebsd/sys/contrib/device-tree/src/riscv/allwinner/
H A Dsun20i-d1s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
6 #include "sunxi-d1s-t113.dtsi"
10 timebase-frequency = <24000000>;
11 #address-cells = <1>;
12 #size-cells = <0>;
19 d-cach
64 plic: interrupt-controller@10000000 { global() label
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/freebsd/sys/riscv/riscv/
H A Dplic.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
10 * and Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of
52 #include <dt-bindings/interrupt-controller/irq.h>
70 (_sc->contexts[_cpu].enable_offset + ((_irq) / 32) * sizeof(uint32_t))
72 (_sc->contexts[_cpu].context_offset + PLIC_CONTEXT_THRESHOLD)
74 (_sc->contexts[_cpu].context_offset + PLIC_CONTEXT_CLAIM)
107 { "sifive,plic-1.0.0", 1 },
108 { "thead,c900-plic", 1 },
113 bus_read_4(sc->mem_res, (reg))
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/freebsd/sys/contrib/device-tree/src/riscv/thead/
H A Dth1520.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 #include <dt-bindings/interrupt-controller/irq.h>
11 #address-cells = <2>;
12 #size-cells = <2>;
15 #address-cells = <1>;
16 #size-cells = <0>;
17 timebase-frequenc
144 plic: interrupt-controller@ffd8000000 { global() label
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