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/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Dadi,axi-dmac.txt1 Analog Devices AXI-DMAC DMA controller
4 - compatible: Must be "adi,axi-dmac-1.00.a".
5 - reg: Specification for the controllers memory mapped register map.
6 - interrupts: Specification for the controllers interrupt.
7 - clocks: Phandle and specifier to the controllers AXI interface clock
8 - #dma-cells: Must be 1.
10 Required sub-nodes:
11 - adi,channels: This sub-node must contain a sub-node for each DMA channel. For
12 the channel sub-nodes the following bindings apply. They must match the
15 Required properties for adi,channels sub-node:
[all …]
H A Darm-pl08x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
13 - $ref: /schemas/arm/primecell.yaml#
14 - $ref: dma-controller.yaml#
22 - arm,pl080
23 - arm,pl081
25 - compatible
[all …]
H A Darm-pl08x.txt4 - compatible: "arm,pl080", "arm,primecell";
7 - arm,primecell-periphid: on the FTDMAC020 the primecell ID is not hard-coded
11 - reg: Address range of the PL08x registers
12 - interrupt: The PL08x interrupt number
13 - clocks: The clock running the IP core clock
14 - clock-names: Must contain "apb_pclk"
15 - lli-bus-interface-ahb1: if AHB master 1 is eligible for fetching LLIs
16 - lli-bus-interface-ahb2: if AHB master 2 is eligible for fetching LLIs
17 - mem-bus-interface-ahb1: if AHB master 1 is eligible for fetching memory contents
18 - mem-bus-interface-ahb2: if AHB master 2 is eligible for fetching memory contents
[all …]
/freebsd/sys/contrib/device-tree/Bindings/misc/
H A Difm-csi.txt1 IFM camera sensor interface on mpc5200 LocalPlus bus
4 - compatible: "ifm,o2d-csi"
5 - reg: specifies sensor chip select number and associated address range
6 - interrupts: external interrupt line number and interrupt sense mode
8 - gpios: three gpio-specifiers for "capture", "reset" and "master enable"
10 - ifm,csi-clk-handle: the phandle to a node in the DT describing the sensor
12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25)
13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16)
14 - ifm,csi-wait-cycles: sensor bus wait cycles
17 - ifm,csi-byte-swap: if this property is present, the byte swapping on
[all …]
/freebsd/lib/libdevctl/
H A Ddevctl.388 bus-specific address.
89 The following bus-specific address formats are currently supported:
90 .Bl -tag -offset indent
91 .It Sy pci Ns Fa domain Ns : Ns Fa bus Ns : Ns Fa slot Ns : Ns Fa function
94 .Fa bus ,
98 .It Sy pci Ns Fa bus Ns : Ns Fa slot Ns : Ns Fa function
100 .Fa bus ,
152 function re-enables a disabled device.
199 function rescans a bus device checking for devices that have been added or
226 function resets the specified device using bus-specific reset method.
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/freebsd/share/man/man9/
H A Dbhnd.91 .\" Copyright (c) 2015-2016 Landon Fuller <landonf@FreeBSD.org>
38 .Ss Bus Resource Functions
70 .Ss "Bus Space Functions"
260 .Fa "device_t dev" "bus_size_t offset" "void *value" "u_int width"
264 .Fa "device_t dev" "bus_size_t offset" "const void *value" "u_int width"
330 .Fa "device_t bus" "const struct bhnd_core_match *desc"
392 .Bd -literal
398 .Bd -literal
406 .Bd -literal
414 .Bd -literal
[all …]
H A Dbhnd_erom.91 .\" Copyright (c) 2015-2016 Landon Fuller <landonf@FreeBSD.org>
128 .Ss Bus Space I/O
156 .Fa "u_int width"
159 .Bd -literal
176 .Fa "u_int width"
202 A pointer to a bus I/O instance mapping the device registers of the first
243 using the bus I/O instance
336 .Ss Bus Space I/O
346 functions to allocate a bus I/O instance, or implement the
353 .Bl -tag -width "read" -offset indent
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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dti,da850-vpif.txt2 ----------------------
12 - compatible: must be "ti,da850-vpif"
13 - reg: physical base address and length of the registers set for the device;
14 - interrupts: should contain IRQ line for the VPIF
18 VPIF has a 16-bit parallel bus input, supporting 2 8-bit channels or a
19 single 16-bit channel. It should contain one or two port child nodes
23 Documentation/devicetree/bindings/media/video-interfaces.txt.
25 Example using 2 8-bit input channels, one of which is connected to an
26 I2C-connected TVP5147 decoder:
29 compatible = "ti,da850-vpif";
[all …]
H A Dst,stm32-dcmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/st,stm32-dcmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hugues Fruchet <hugues.fruchet@foss.st.com>
14 const: st,stm32-dcmi
25 clock-names:
27 - const: mclk
32 dma-names:
34 - const: tx
[all …]
/freebsd/sys/contrib/device-tree/Bindings/bus/
H A Dnvidia,tegra20-gmi.txt1 Device tree bindings for NVIDIA Tegra Generic Memory Interface bus
3 The Generic Memory Interface bus enables memory transfers between internal and
10 - compatible : Should contain one of the following:
11 For Tegra20 must contain "nvidia,tegra20-gmi".
12 For Tegra30 must contain "nvidia,tegra30-gmi".
13 - reg: Should contain GMI controller registers location and length.
14 - clocks: Must contain an entry for each entry in clock-names.
15 - clock-names: Must include the following entries: "gmi"
16 - resets : Must contain an entry for each entry in reset-names.
17 - reset-names : Must include the following entries: "gmi"
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/bridge/
H A Dti,tfp410.txt5 - compatible: "ti,tfp410"
8 - powerdown-gpios: power-down gpio
9 - reg: I2C address. If and only if present the device node should be placed
11 - ti,deskew: data de-skew in 350ps increments, from -4 to +3, as configured
20 - Port 0 is the DPI input port. Its endpoint subnode shall contain a
21 pclk-sample and bus-width property and a remote-endpoint property as specified
23 - If pclk-sample is not defined, pclk-sample = 0 should be assumed for
25 - If bus-width is not defined then bus-width = 24 should be assumed for
27 bus-width = 24: 24 data lines are connected and single-edge mode
28 bus-width = 12: 12 data lines are connected and dual-edge mode
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dcavium-mmc.txt10 - compatible : should be one of:
11 cavium,octeon-6130-mmc
12 cavium,octeon-7890-mmc
13 cavium,thunder-8190-mmc
14 cavium,thunder-8390-mmc
15 mmc-slot
16 - reg : mmc controller base registers
17 - clocks : phandle
20 - for cd, bus-width and additional generic mmc parameters
22 - cavium,cmd-clk-skew : number of coprocessor clocks before sampling command
[all …]
/freebsd/sys/contrib/device-tree/Bindings/auxdisplay/
H A Dhit,hd44780.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert@linux-m68k.org>
14 LCDs that can display one or more lines of text. It exposes an M6800 bus
15 interface, which can be used in either 4-bit or 8-bit mode. By using a
24 data-gpios:
26 GPIO pins connected to the data signal lines DB0-DB7 (8-bit mode) or
27 DB4-DB7 (4-bit mode) of the LCD Controller's bus interface.
29 - maxItems: 4
[all …]
/freebsd/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-g6.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
47 #address-cells = <1>;
48 #size-cells = <0>;
49 enable-method = "aspeed,ast2600-smp";
[all …]
/freebsd/share/man/man4/
H A Dspigen.436 .Bd -ragged -offset indent
45 .Bd -literal -offset indent
51 driver provides direct access to a slave device on the SPI bus.
54 device is associated with a single chip-select
55 line on the bus, and all I/O performed through that instance is done
56 with that chip-select line asserted.
58 SPI data transfers are inherently bi-directional; there are no separate
75 .Bl -tag -width indent
83 .Bd -literal
91 The buffers for the transfer are a previously-mmap'd region.
[all …]
H A Dpci.430 .Nd generic PCI/PCIe bus driver
32 To compile the PCI bus driver into the kernel,
35 .Bd -ragged -offset indent
40 .Pq SR-IOV :
41 .Bd -ragged -offset indent
45 To compile in support for native PCI-express HotPlug:
46 .Bd -ragged -offset indent
91 or a BAR read access could have function-specific side-effects.
113 driver also includes support for PCI-PCI bridges,
114 various platform-specific Host-PCI bridges,
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6q-gw54xx.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
8 #include "imx6qdl-gw54xx.dtsi"
9 #include <dt-bindings/media/tda1997x.h>
13 compatible = "gw,imx6q-gw54xx", "gw,ventana", "fsl,imx6q";
15 sound-digital {
16 compatible = "simple-audio-card";
17 simple-audio-card,name = "tda1997x-audio";
18 simple-audio-card,format = "i2s";
19 simple-audio-card,bitclock-master = <&sound_codec>;
[all …]
/freebsd/sys/dev/bhnd/
H A Dbhnd_erom.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
37 #include <sys/bus.h>
40 #include <machine/bus.h>
57 bhnd_size_t offset, u_int width);
65 bhnd_size_t offset, u_int width);
76 int mapped_rid; /**< resource ID of current mapping, or -1 */
80 * Fetch the device enumeration parser class from all bhnd(4)-compatible drivers
84 * @param bus_devclass The bus device class to be queried for
85 * bhnd(4)-compatible drivers.
[all …]
H A Dbhnd_bus_if.m1 #-
2 # Copyright (c) 2015-2016 Landon Fuller <landonf@FreeBSD.org>
31 #include <sys/bus.h>
40 # bhnd(4) bus interface
185 bus_size_t offset, void *value, u_int width)
192 bus_size_t offset, void *value, u_int width)
258 return (-1);
286 * Return the bhnd(4) bus driver's device enumeration parser class.
288 * @param driver The bhnd bus driver instance.
295 * Register a shared bus @p provider for a given @p service.
[all …]
/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Di2c-ocores.txt1 Device tree configuration for i2c-ocores
4 - compatible : "opencores,i2c-ocores"
6 "sifive,fu540-c000-i2c", "sifive,i2c0"
8 FU540-C000 SoC.
9 "sifive,fu740-c000-i2c", "sifive,i2c0"
11 FU740-C000 SoC.
12 Please refer to sifive-blocks-ip-versioning.txt for
14 - reg : bus address start and address range size of device
15 - clocks : handle to the controller clock; see the note below.
16 Mutually exclusive with opencores,ip-clock-frequency
[all …]
H A Dopencores,i2c-ocores.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/opencores,i2c-ocores.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Korsgaard <peter@korsgaard.com>
11 - Andrew Lunn <andrew@lunn.ch>
14 - $ref: /schemas/i2c/i2c-controller.yaml#
19 - items:
20 - enum:
21 - sifive,fu740-c000-i2c # Opencore based IP block FU740-C000 SoC
[all …]
/freebsd/sbin/camcontrol/
H A Dcamcontrol.8110 .Aq all | device id | bus Ns Op :target:lun
113 .Aq all | device id | bus Ns Op :target:lun
145 .Bk -words
195 .Aq all | off | device id | bus Ns Op :target Ns Op :lun
402 .Bl -tag -width 14n
405 .It bus:target
406 Specify a bus number and target id.
407 The bus number can be determined from
411 .It bus:target:lun
412 Specify the bus, target and lun for a device.
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dgpmc-eth.txt4 General-Purpose Memory Controller can be used to connect Pseudo-SRAM devices
5 such as ethernet controllers to processors using the TI GPMC as a data bus.
12 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
18 Child nodes need to specify the GPMC bus address width using the "bank-width"
20 specify the I/O registers address width. Even when the GPMC has a maximum 16-bit
21 address width, it supports devices with 32-bit word registers.
23 OMAP2+ board, "bank-width = <2>;" and "reg-io-width = <4>;".
26 - bank-width: Address width of the device in bytes. GPMC supports 8-bit
27 and 16-bit devices and so must be either 1 or 2 bytes.
28 - compatible: Compatible string property for the ethernet child device.
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls1088a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
17 compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
21 bus-num = <0>;
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "jedec,spi-nor";
29 spi-max-frequency = <1000000>;
33 #address-cells = <1>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mips/cavium/
H A Dbootbus.txt1 * Boot Bus
3 The Octeon Boot Bus is a configurable parallel bus with 8 chip
7 - compatible: "cavium,octeon-3860-bootbus"
11 - reg: The base address of the Boot Bus' register bank.
13 - #address-cells: Must be <2>. The first cell is the chip select
16 - #size-cells: Must be <1>.
18 - ranges: There must be one one triplet of (child-bus-address,
19 parent-bus-address, length) for each active chip select. If the
27 - compatible: "cavium,octeon-3860-bootbus-config"
29 - cavium,cs-index: A single cell indicating the chip select that
[all …]

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