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Searched +full:bcm3380 +full:- +full:l2 +full:- +full:intc (Results 1 – 4 of 4) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dbrcm,bcm7120-l2-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controlle
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H A Dbrcm,bcm3380-l2-intc.txt1 Broadcom BCM3380-style Level 1 / Level 2 interrupt controller
6 - outputs a single interrupt signal to its interrupt controller parent
8 - contains one or more enable/status word pairs, which often appear at
11 - no atomic set/clear operations
15 - compatible: should be "brcm,bcm3380-l2-intc"
16 - reg: specifies one or more enable/status pairs, in the following format:
18 - interrupt-controller: identifies the node as an interrupt controller
19 - #interrupt-cells: specifies the number of cells needed to encode an interrupt
21 - interrupts: specifies the interrupt line in the interrupt-parent controller
26 - brcm,irq-can-wake: if present, this means the L2 controller can be used as a
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/freebsd/sys/contrib/device-tree/src/mips/brcm/
H A Dbcm3384_zephyr.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 mips-hpt-frequency = <100000000>;
35 #address-cells = <0>;
36 compatible = "mti,cpu-interrupt-controller";
38 interrupt-controller;
39 #interrupt-cells = <1>;
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H A Dbcm3384_viper.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
5 compatible = "brcm,bcm3384-viper", "brcm,bcm33843-viper";
16 #address-cells = <1>;
17 #size-cells = <0>;
20 mips-hpt-frequency = <300000000>;
30 #address-cells = <0>;
31 compatible = "mti,cpu-interrupt-controller";
33 interrupt-controller;
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