| /freebsd/sys/contrib/device-tree/Bindings/i2c/ |
| H A D | brcm,brcmstb-i2c.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/brcm,brcmstb-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kamal Dasu <kdasu.kdev@gmail.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - brcm,bcm2711-hdmi-i2c
19 - brcm,brcmstb-i2c
20 - brcm,brcmper-i2c
25 - description: BSC register range
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| H A D | marvell,mv64xxx-i2c.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/marvell,mv64xxx-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell MV64XXX I2C Controller
10 - Gregory CLEMENT <gregory.clement@bootlin.com>
15 - const: allwinner,sun4i-a10-i2c
16 - items:
17 - const: allwinner,sun7i-a20-i2c
18 - const: allwinner,sun4i-a10-i2c
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| H A D | i2c-exynos5.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung's High Speed I2C controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 The Samsung's High Speed I2C controller is used to interface with I2C devices
17 e.g. for Exynos850 and Exynos Auto V9 SoCs), it might be also necessary to
18 define USI node in device tree file, choosing "i2c" configuration. Please see
19 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details.
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| /freebsd/sys/dev/ixgbe/ |
| H A D | ixgbe_phy.c | 2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
54 * ixgbe_out_i2c_byte_ack - Send I2C byte with ack
71 * ixgbe_in_i2c_byte_ack - Receive an I2C byte and send ack
85 * ixgbe_ones_comp_byte_add - Perform one's complement addition
89 * Returns one's complement 8-bit sum.
100 * ixgbe_read_i2c_combined_generic_int - Perform I2C read combined operation
102 * @addr: I2C bus address to read from
103 * @reg: I2C device register to read from
112 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_read_i2c_combined_generic_int()
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| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | as3711.txt | 1 AS3711 is an I2C PMIC from Austria MicroSystems with multiple DCDC and LDO power
4 standard regulator properties, they must belong to a sub-node, called
9 - compatible : must be "ams,as3711"
10 - reg : specifies the I2C address
14 - su1-dev : framebuffer phandle
15 - su1-max-uA : maximum current
19 - su2-dev : framebuffer phandle
20 - su1-max-uA : maximum current
24 - su2-feedback-voltage : voltage feedback is used
25 - su2-feedback-curr1 : CURR1 input used for current feedback
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| /freebsd/sys/contrib/device-tree/Bindings/hwmon/ |
| H A D | adi,ltc4282.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices LTC4282 I2C High Current Hot Swap Controller over I2C
10 - Nuno Sa <nuno.sa@analog.com>
13 Analog Devices LTC4282 I2C High Current Hot Swap Controller over I2C.
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ltc4282.pdf
20 - adi,ltc4282
25 vdd-supply: true
30 '#clock-cells':
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| /freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
| H A D | tegra30-asus-tf700t.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-asus-transformer-common.dtsi"
20 remote-endpoint = <&bridge_input>;
21 bus-width = <24>;
36 nvidia,enable-inpu
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| H A D | tegra30-asus-tf201.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-asus-transformer-common.dtsi"
5 #include "tegra30-asus-lvds-display.dtsi"
19 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
27 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
35 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
43 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
51 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
57 /* Azurewave AW-NH615 BCM4329B1 */
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| H A D | tegra30-asus-tf300t.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-asus-transformer-common.dtsi"
5 #include "tegra30-asus-lvds-display.dtsi"
12 tf300t-init-hog {
13 gpio-hog;
15 output-low;
27 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
35 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
43 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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| H A D | tegra30-asus-tf300tg.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-asus-transformer-common.dtsi"
5 #include "tegra30-asus-lvds-display.dtsi"
12 tf300tg-init-hog {
13 gpio-hog;
28 output-low;
39 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
47 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
55 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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| /freebsd/sys/contrib/device-tree/Bindings/extcon/ |
| H A D | extcon-rt8973a.txt | 2 * Richtek RT8973A - Micro USB Switch device
4 The Richtek RT8973A is Micro USB Switch with OVP and I2C interface. The RT8973A
7 speed USB operation. Also, RT8973A support 'auto-configuration' mode.
8 If auto-configuration mode is enabled, RT8973A would control internal h/w patch
9 for USB D-/D+ switching.
12 - compatible: Should be "richtek,rt8973a-muic"
13 - reg: Specifies the I2C slave address of the MUIC block. It should be 0x14
14 - interrupts: Interrupt specifiers for detection interrupt sources.
19 compatible = "richtek,rt8973a-muic";
20 interrupt-parent = <&gpx1>;
|
| /freebsd/sys/contrib/device-tree/Bindings/media/i2c/ |
| H A D | galaxycore,gc0308.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/i2c/galaxycore,gc0308.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
14 programmable through an I2C interface and connected via parallel bus.
15 They include an ISP capable of auto exposure and auto white balance.
18 - $ref: /schemas/media/video-interface-devices.yaml#
23 - const: galaxycore,gc0308
24 - items:
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| H A D | chrontel,ch7322.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/i2c/chrontel,ch7322.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Chrontel HDMI-CEC Controller
10 - Jeff Chase <jnchase@google.com>
13 The Chrontel CH7322 is a discrete HDMI-CEC controller. It is
14 programmable through I2C and drives a single CEC line.
17 - $ref: /schemas/media/cec/cec-common.yaml#
24 description: I2C device address
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| H A D | sony,imx296.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/i2c/sony,imx296.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Sony IMX296 1/2.8-Inch CMOS Image Sensor
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
13 description: |-
14 The Sony IMX296 is a 1/2.9-Inch active pixel type CMOS Solid-state image
16 features a global shutter with variable charge-integration time. It is
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| H A D | techwell,tw9900.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/i2c/techwell,tw9900.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mehdi Djait <mehdi.djait@bootlin.com>
13 The tw9900 is a multi-standard video decoder, supporting NTSC, PAL standards
14 with auto-detection features.
23 vdd-supply:
26 reset-gpios:
30 powerdown-gpios:
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| /freebsd/sys/dev/ichiic/ |
| H A D | ig4_reg.h | 36 * Intel fourth generation mobile cpus integrated I2C device.
40 * https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/4th-gen-core-family-mobile-i-o-datasheet.pdf
42 * This is a from-scratch driver under the BSD license using the Intel data
48 * This controller is an I2C maste
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| /freebsd/sys/contrib/device-tree/Bindings/net/dsa/ |
| H A D | lan9303.txt | 2 -------------------------------------------------
6 - compatible: should be
7 - "smsc,lan9303-i2c" for I2C managed mode
9 - "smsc,lan9303-mdio" for mdio managed mode
13 - reset-gpios: GPIO to be used to reset the whole device
14 - reset-duration: reset duration in milliseconds, defaults to 200 ms
23 auto-detected and mapped accordingly.
27 I2C managed mode:
31 fixed-link { /* RMII fixed link to LAN9303 */
33 full-duplex;
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| /freebsd/sys/contrib/device-tree/Bindings/regulator/ |
| H A D | richtek,rt5759-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rt5759-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
13 The RT5759 is a high-performance, synchronous step-down DC-DC converter that
15 voltage can be programmable with I2C controlled 7-Bit VID.
18 https://www.richtek.com/assets/product_file/RT5759/DS5759-00.pdf
23 - richtek,rt5759
24 - richtek,rt5759a
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| H A D | richtek,rt4803.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
15 supports boost and auto bypass mode that depends on the difference between the
20 https://www.richtek.com/assets/product_file/RT4803/DS4803-03.pdf
21 https://www.richtek.com/assets/product_file/RT4803A/DS4803A-06.pdf
24 - $ref: regulator.yaml#
29 - richtek,rt4803
34 richtek,vsel-active-high:
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| /freebsd/share/man/man4/ |
| H A D | lm75.4 | 30 .Nd lm75 i2c digital temperature sensor driver
41 It provides an easy and simple way to check the functionality of an i2c bus
51 .Bd -literal
62 dev.lm75.0.polarity: active-low
65 .Bl -tag -width ".Va dev.lm75.%d.temperature"
67 Is the read-only value of the current temperature read by the sensor.
86 It can be set to 'active-low' (default) or 'active-high'.
87 Please note that the output pin is an open-drain output and it needs a
88 proper pull-up resistor to work.
91 The temperature conversion stops but the sensor remains with its i2c bus
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| /freebsd/sys/contrib/device-tree/src/arm/aspeed/ |
| H A D | aspeed-g6.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
47 #address-cells = <1>;
48 #size-cells = <0>;
49 enable-method = "aspeed,ast2600-smp";
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| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | cs35l33.txt | 5 - compatible : "cirrus,cs35l33"
7 - reg : the I2C address of the device for I2C
9 - VA-supply, VP-supply : power supplies for the device,
15 - reset-gpios : gpio used to reset the amplifier
17 - interrupts : IRQ line info CS35L33.
18 (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
21 - cirrus,boost-ctl : Booster voltage use to supply the amp. If the value is
26 - cirrus,ramp-rate : On power up, it affects the time from when the power
27 up sequence begins to the time the audio reaches a full-scale output.
28 On power down, it affects the time from when the power-down sequence
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| /freebsd/sys/contrib/device-tree/Bindings/rtc/ |
| H A D | abracon,abx80x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Abracon ABX80X I2C ultra low power RTC/Alarm chip
10 - linux-rtc@vger.kernel.org
17 must perform auto-detection from ID register.
19 - abracon,abx80x
20 - abracon,ab0801
21 - abracon,ab0803
22 - abracon,ab0804
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| /freebsd/sys/contrib/device-tree/src/powerpc/fsl/ |
| H A D | p1010si-post.dtsi | 36 #address-cells = <2>;
37 #size-cells = <1>;
44 compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0 255>;
49 clock-frequency = <33333333>;
54 #interrupt-cells = <1>;
55 #size-cells = <2>;
56 #address-cells = <3>;
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| H A D | bsc9131si-post.dtsi | 4 * Copyright 2011-2012 Freescale Semiconductor Inc.
36 #address-cells = <2>;
37 #size-cells = <1>;
43 #address-cells = <1>;
44 #size-cells = <1>;
46 compatible = "fsl,bsc9131-immr", "simple-bus";
47 bus-frequency = <0>; // Filled out by uboot.
49 ecm-law@0 {
50 compatible = "fsl,ecm-law";
52 fsl,num-laws = <12>;
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