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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Daspeed,ast2400-vic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2400-vic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <andrew@codeconstruct.com.au>
13 The AST2400 and AST2500 SoC families include a legacy register layout before
20 - aspeed,ast2400-vic
21 - aspeed,ast2500-vic
26 interrupt-controller: true
28 "#interrupt-cells":
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H A Daspeed,ast2400-vic.txt3 These bindings are for the Aspeed interrupt controller. The AST2400 and
4 AST2500 SoC families include a legacy register layout before a re-designed
9 - compatible : "aspeed,ast2400-vic"
10 "aspeed,ast2500-vic"
12 - interrupt-controller : Identifies the node as an interrupt controller
13 - #interrupt-cells : Specifies the number of cells needed to encode an
18 vic: interrupt-controller@1e6c0080 {
19 compatible = "aspeed,ast2400-vic";
20 interrupt-controller;
21 #interrupt-cells = <1>;
/freebsd/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-g4.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
6 compatible = "aspeed,ast2400";
7 #address-cells = <1>;
8 #size-cells = <1>;
9 interrupt-parent = <&vic>;
35 #address-cells = <1>;
36 #size-cells = <0>;
39 compatible = "arm,arm926ej-s";
51 compatible = "simple-bus";
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H A Daspeed-g5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
10 interrupt-parent = <&vic>;
36 #address-cells = <1>;
37 #size-cells = <0>;
40 compatible = "arm,arm1176jzf-s";
52 compatible = "simple-bus";
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