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Searched full:apicv (Results 1 – 12 of 12) sorted by relevance

/linux/arch/x86/kvm/vmx/
H A Dposted_intr.c66 * To simplify hot-plug and dynamic toggling of APICv, keep PI.NDST and in vmx_vcpu_pi_load()
67 * PI.SN up-to-date even if there is no assigned device or if APICv is in vmx_vcpu_pi_load()
H A Dvmx.c4190 * through reads for all valid registers by default in x2APIC+APICv in vmx_update_msr_bitmap_x2apic()
4613 * IPI virtualization relies on APICv. Disable IPI virtualization if in vmx_tertiary_exec_control()
4614 * APICv is inhibited. in vmx_tertiary_exec_control()
6881 * APICv is enabled, but paranoia won't hurt in this case. in vmx_set_apic_access_page_addr()
6899 * if APICv is permanently inhibited, i.e. the memslot won't reappear. in vmx_set_apic_access_page_addr()
7007 * 2) If APICv is disabled for this vCPU, assigned devices may still in vmx_sync_pir_to_irr()
H A Dtdx.c685 * TDX module mandates APICv, which requires an in-kernel local APIC. in tdx_vcpu_create()
3531 pr_err("APICv is required for TDX\n"); in tdx_bringup()
H A Dnested.c849 /* tpr shadow is needed by all apicv features. */ in nested_vmx_check_apicv_controls()
4482 * if APICv is active. in vmx_check_nested_events()
/linux/arch/x86/kvm/
H A Dlapic.c424 * The optimized map is effectively KVM's internal version of APICv, in kvm_recalculate_apic_map()
426 * map also applies to APICv. in kvm_recalculate_apic_map()
1850 * On APICv, this test will cause a busy wait
2774 * When APICv is enabled, KVM must always search the IRR for a pending in kvm_apic_update_apicv()
2776 * isn't running. If APICv is disabled, KVM _should_ search the IRR in kvm_apic_update_apicv()
2780 * still sees APICv as being enabled. in kvm_apic_update_apicv()
2782 * FIXME: Ensure other vCPUs and devices observe the change in APICv in kvm_apic_update_apicv()
3047 * Opportunistically mark APICv active as VMX in particularly is highly in kvm_create_lapic()
3048 * unlikely to have inhibits. Ignore the current per-VM APICv state so in kvm_create_lapic()
H A Di8254.c305 * So, deactivate APICv when PIT is in reinject mode. in kvm_pit_set_reinject()
H A Dx86.c10882 /* Do not activate APICV when APIC is disabled */ in __kvm_vcpu_update_apicv()
10894 * When APICv gets disabled, we may still have injected interrupts in __kvm_vcpu_update_apicv()
10895 * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was in __kvm_vcpu_update_apicv()
10899 * Update SVI when APICv gets enabled, otherwise SVI won't reflect the in __kvm_vcpu_update_apicv()
11276 * 2) For APICv, we should set ->mode before checking PID.ON. This in vcpu_enter_guest()
11289 * target vCPU wasn't running). Do this regardless of the vCPU's APICv in vcpu_enter_guest()
11290 * status, KVM doesn't update assigned devices when APICv is inhibited, in vcpu_enter_guest()
11291 * i.e. they can post interrupts even if APICv is temporarily disabled. in vcpu_enter_guest()
11357 * Assert that vCPU vs. VM APICv state is consistent. An APICv in vcpu_enter_guest()
H A Dhyperv.c145 * Inhibit APICv if any vCPU is using SynIC's AutoEOI, which relies on in synic_update_vector()
/linux/arch/x86/include/asm/
H A Dvmxfeatures.h32 #define VMX_FEATURE_APICV ( 0*32+ 25) /* "apicv" TPR shadow + APIC reg virt + virt intr del…
H A Dkvm_host.h1250 /* INHIBITs that are relevant to both Intel's APICv and AMD's AVIC. */
1273 * was enabled, to avoid AVIC/APICv bypassing it.
1278 * APICv is disabled because not all vCPUs have a 1:1 mapping between
1298 * This is needed because unlike APICv, the peers of this vCPU
1934 * Returns vCPU specific APICv inhibit reasons
/linux/arch/x86/kvm/svm/
H A Davic.c1176 /* APICv should only be toggled on/off while the vCPU is running. */ in avic_refresh_apicv_exec_ctrl()
/linux/arch/x86/kvm/mmu/
H A Dmmu.c4684 * using APICv/AVIC to accelerate L2 accesses to L1's APIC, in kvm_mmu_faultin_pfn()
4691 * of breaking APICv/AVIC for L1. in kvm_mmu_faultin_pfn()