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Searched full:_upd (Results 1 – 9 of 9) sorted by relevance

/freebsd/sys/dev/bhnd/cores/chipc/
H A Dchipc_gpiovar.h107 #define CC_GPIO_UPDATE(_upd, _pin, _reg, _val) do { \ argument
108 (_upd)->_reg.mask |= (1 << (_pin)); \
110 (_upd)->_reg.value |= (1 << (_pin)); \
112 (_upd)->_reg.value &= ~(1 << (_pin)); \
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleSwift.td486 "LDM(IA|DA|DB|IB)_UPD", "(t2|sys|t)LDM(IA|DA|DB|IB)_UPD")>;
537 (instregex "STM(IB|IA|DB|DA)_UPD", "(t2|sys|t)STM(IB|IA|DB|DA)_UPD",
822 (instregex "VLDM[SD](IA|DB)_UPD$")>;
858 (instregex "VSTM[SD](IA|DB)_UPD")>;
910 (instregex "VLD3(d|q)(8|16|32)_UPD$")>;
925 (instregex "VLD4(d|q)(8|16|32)_UPD")>;
935 (instregex "VLD1(LN|DUP)(d|q)(8|16|32)(wb|_UPD)",
943 (instregex "VLD2LN(d|q)(8|16|32)_UPD
[all...]
H A DARMScheduleR52.td483 (instregex "LDM(IA|DA|DB|IB)_UPD", "(t2|sys|t)LDM(IA|DA|DB|IB)_UPD")>;
508 (instregex "STM(IB|IA|DB|DA)_UPD", "(t2|sys|t)STM(IB|IA|DB|DA)_UPD",
854 def : InstRW<[R52WriteVST1Mem, R52WriteAdr, R52Read_ISS, R52Read_F2], (instregex "VST1LNd(8|16|32)_UPD")>;
874 def : InstRW<[R52WriteVST1Mem, R52WriteAdr, R52Read_ISS, R52Read_F2], (instregex "VST2LNd(8|16|32)_UPD")>;
877 def : InstRW<[R52WriteVST1Mem, R52WriteAdr, R52Read_ISS, R52Read_F2], (instregex "VST2LNq(16|32)_UPD")>;
893 def : InstRW<[R52WriteVST4Mem, R52WriteAdr, R52Read_ISS, R52Read_F2], (instregex "VST3(d|q)(8|16|32)_UPD$")>;
897 def : InstRW<[R52WriteVST2Mem, R52WriteAdr, R52Read_ISS, R52Read_F2], (instregex "VST3LNd(8|16|32)_UPD$")>;
900 def : InstRW<[R52WriteVST2Mem, R52WriteAdr, R52Read_ISS, R52Read_F2], (instregex "VST3LNq(16|32)_UPD
[all...]
H A DARMScheduleA57.td1278 "VLD1(LN|DUP)(d|q)(8|16|32)(wb|_UPD)", "VLD1LNq(8|16|32)Pseudo_UPD")>;
1297 (instregex "VLD2LN(d|q)(8|16|32)_UPD$")>;
1313 (instregex "VLD3(d|q)(8|16|32)_UPD$")>;
1324 (instregex "VLD3LN(d|q)32_UPD")>;
1334 (instregex "VLD3LN(d|q)(8|16)_UPD")>;
1344 (instregex "VLD3DUP(d|q)(8|16|32)_UPD")>;
1356 (instregex "VLD4(d|q)(8|16|32)_UPD")>;
1368 (instregex "VLD4LN(d|q)32_UPD")>;
1380 (instregex "VLD4LN(d|q)(8|16)_UPD")>;
1392 (instregex "VLD4DUP(d|q)(8|16|32)_UPD")>;
[all …]
H A DARMScheduleM7.td247 (instregex "(t|t2)LDM(DB|IA)_UPD$", "tPOP")>;
249 (instregex "(t|t2)STM(DB|IA)_UPD$", "tPUSH")>;
314 (instregex "VLDM(S|D|Q)(DB|IA)_UPD$")>;
316 (instregex "VSTM(S|D|Q)(DB|IA)_UPD$")>;
H A DARMLoadStoreOptimizer.cpp1526 // VLDM[SD]_UPD, VSTM[SD]_UPD in MergeBaseUpdateLoadStore()
H A DARMISelLowering.cpp15989 // Now, create a _UPD node, taking care of not breaking alignment. in TryCombineBaseUpdate()
15996 // The alignment is overlooked when selecting _UPD variants; and it's in TryCombineBaseUpdate()
16017 // to transform to VLD/VST 1_UPD nodes. in TryCombineBaseUpdate()
/freebsd/sys/contrib/dev/acpica/common/
H A Dahpredef.c460 AH_PREDEF ("_UPD", "User Presence Detect", "Returns user detection information"),
/freebsd/sys/contrib/dev/acpica/include/
H A Dacpredef.h1190 {{"_UPD", METHOD_0ARGS,