Home
last modified time | relevance | path

Searched full:wdma (Results 1 – 25 of 26) sorted by relevance

12

/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,wdma.yaml4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,wdma.yaml#
14 Mediatek Write Direct Memory Access(WDMA) component used to write
16 WDMA device node must be siblings to the central MMSYS_CONFIG node.
25 - mediatek,mt8173-disp-wdma
27 - const: mediatek,mt6795-disp-wdma
28 - const: mediatek,mt8173-disp-wdma
43 - description: WDMA Clock
80 wdma0: wdma@14011000 {
81 compatible = "mediatek,mt8173-disp-wdma";
/linux/Documentation/devicetree/bindings/soc/mediatek/
H A Dmediatek,wdma.yaml4 $id: http://devicetree.org/schemas/soc/mediatek/mediatek,wdma.yaml#
14 MediaTek Write Direct Memory Access(WDMA) component used to write
21 - mediatek,mt8183-mdp3-wdma
72 mdp3_wdma: mdp3-wdma@14006000 {
73 compatible = "mediatek,mt8183-mdp3-wdma";
/linux/drivers/net/ethernet/mediatek/
H A Dmtk_wed.h40 void __iomem *wdma; member
104 writel(val, dev->hw->wdma + reg); in wdma_w32()
110 return readl(dev->hw->wdma + reg); in wdma_r32()
183 void __iomem *wdma, phys_addr_t wdma_phy,
193 void __iomem *wdma, phys_addr_t wdma_phy, in mtk_wed_add_hw() argument
H A Dmtk_wed.c1663 /* reset tx wdma */ in mtk_wed_rx_reset()
1666 /* reset tx wdma drv */ in mtk_wed_rx_reset()
1751 /* 2. reset WDMA rx DMA */ in mtk_wed_reset_dma()
1879 struct mtk_wed_ring *wdma; in mtk_wed_wdma_rx_ring_setup() local
1884 wdma = &dev->rx_wdma[idx]; in mtk_wed_wdma_rx_ring_setup()
1885 if (!reset && mtk_wed_ring_alloc(dev, wdma, MTK_WED_WDMA_RING_SIZE, in mtk_wed_wdma_rx_ring_setup()
1890 wdma->desc_phys); in mtk_wed_wdma_rx_ring_setup()
1896 wdma->desc_phys); in mtk_wed_wdma_rx_ring_setup()
1907 struct mtk_wed_ring *wdma; in mtk_wed_wdma_tx_ring_setup() local
1912 wdma = &dev->tx_wdma[idx]; in mtk_wed_wdma_tx_ring_setup()
[all …]
H A Dmtk_wed_debugfs.c115 DUMP_STR("WED WDMA RX"), in wed_txinfo_show()
128 DUMP_STR("WDMA RX"), in wed_txinfo_show()
187 DUMP_STR("WED WDMA TX"), in wed_rxinfo_show()
191 DUMP_STR("WDMA TX"), in wed_rxinfo_show()
H A Dmtk_eth_soc.c3800 /* WDMA sanity checks */ in mtk_hw_check_dma_hang()
4008 /* PSE should not drop port8 and port9 packets from WDMA Tx */ in mtk_hw_init()
4011 /* PSE should drop packets to port 8/9 on WDMA Rx ring full */ in mtk_hw_init()
/linux/Documentation/devicetree/bindings/media/
H A Dmediatek-mdp.txt14 "mediatek,mt8173-mdp-wdma" - write DMA
25 "mediatek,mt8173-mdp-wdma"
73 mdp_wdma0: wdma@14006000 {
74 compatible = "mediatek,mt8173-mdp-wdma";
/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623n.dtsi157 wdma@14009000 {
158 compatible = "mediatek,mt7623-disp-wdma",
159 "mediatek,mt2701-disp-wdma";
/linux/drivers/media/platform/mediatek/vcodec/decoder/
H A Dvdec_msg_queue.h53 * @wdma_err_addr: wdma error address used for lat hardware
88 * @wdma_addr: wdma address used for ube
/linux/drivers/media/platform/mediatek/mdp3/
H A Dmtk-mdp3-comp.c906 /* Reset WDMA */ in init_wdma()
926 reg = CFG_COMP(MT8183, ctx->param, wdma.wdma_cfg); in config_wdma_frame()
931 reg = CFG_COMP(MT8183, ctx->param, wdma.iova[0]); in config_wdma_frame()
935 reg = CFG_COMP(MT8183, ctx->param, wdma.iova[1]); in config_wdma_frame()
939 reg = CFG_COMP(MT8183, ctx->param, wdma.iova[2]); in config_wdma_frame()
944 reg = CFG_COMP(MT8183, ctx->param, wdma.w_in_byte); in config_wdma_frame()
949 reg = CFG_COMP(MT8183, ctx->param, wdma.uv_stride); in config_wdma_frame()
968 reg = CFG_COMP(MT8183, ctx->param, wdma.subfrms[index].offset[0]); in config_wdma_subfrm()
973 reg = CFG_COMP(MT8183, ctx->param, wdma.subfrms[index].offset[1]); in config_wdma_subfrm()
978 reg = CFG_COMP(MT8183, ctx->param, wdma.subfrms[index].offset[2]); in config_wdma_subfrm()
[all …]
H A Dmdp_sm_mt8183.h132 struct mdp_wdma_data_8183 wdma; member
H A Dmdp_sm_mt8195.h271 struct mdp_wdma_data_8195 wdma; member
H A Dmdp_cfg_data.c803 .compatible = "mediatek,mt8183-mdp3-wdma",
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt6795.dtsi782 wdma0: wdma@14011000 {
783 compatible = "mediatek,mt6795-disp-wdma", "mediatek,mt8173-disp-wdma";
792 wdma1: wdma@14012000 {
793 compatible = "mediatek,mt6795-disp-wdma", "mediatek,mt8173-disp-wdma";
H A Dmt8173.dtsi1050 mdp_wdma0: wdma@14006000 {
1051 compatible = "mediatek,mt8173-mdp-wdma";
1124 wdma0: wdma@14011000 {
1125 compatible = "mediatek,mt8173-disp-wdma";
1134 wdma1: wdma@14012000 {
1135 compatible = "mediatek,mt8173-disp-wdma";
H A Dmt8183.dtsi1716 mdp3-wdma@14006000 {
1717 compatible = "mediatek,mt8183-mdp3-wdma";
/linux/drivers/media/platform/mediatek/vcodec/decoder/vdec/
H A Dvdec_h264_req_multi_if.c77 * @wdma_err_addr: wdma error dma address
78 * @wdma_start_addr: wdma start dma address
79 * @wdma_end_addr: wdma end dma address
86 * @wdma_end_addr_offset: wdma end address offset
H A Dvdec_hevc_req_multi_if.c256 * @wdma_end_addr_offset: wdma end address offset
/linux/drivers/media/platform/mediatek/mdp/
H A Dmtk_mdp_core.c39 .compatible = "mediatek,mt8173-mdp-wdma",
/linux/drivers/net/ethernet/myricom/myri10ge/
H A Dmyri10ge_mcp.h191 * data2 = RDMA length (MSH), WDMA length (LSH)
/linux/drivers/gpu/drm/mediatek/
H A Dmtk_ddp_comp.c444 [MTK_DISP_WDMA] = "wdma",
H A Dmtk_drm_drv.c790 { .compatible = "mediatek,mt8173-disp-wdma",
/linux/drivers/media/platform/samsung/s5p-jpeg/
H A Djpeg-regs.h618 /* RDMA and WDMA operation status register */
/linux/drivers/scsi/be2iscsi/
H A Dbe_cmds.c39 "WDMA ",
/linux/sound/soc/codecs/
H A Dwm_adsp.c98 __be32 wdma[8]; member

12