| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | al,alpine-msix.yaml | 27 al,msi-num-spis:
28 description: number of SPIs assigned to the MSI frame, relative to SPI0
36 - al,msi-num-spis
48 al,msi-num-spis = <160>;
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| H A D | socionext,synquacer-exiu.yaml | 15 level-high type GICv3 SPIs.
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| H A D | qcom,mpm.yaml | 64 A set of MPM pin numbers and the corresponding GIC SPIs.
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | mediatek,mt76x8-pinctrl.yaml | 42 spi, spi cs1, spis, sw_r, uart0, uart1, uart2, utif, wdt,
83 spi cs1, spis, uart0, uart1, uart2, wdt, wled_an,
266 enum: [spis]
343 const: spis
347 enum: [spis]
393 p3led_kn, p4led_an, p4led_kn, pwm0, pwm1, sdmode, spis]
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| H A D | img,pistachio-pinctrl.txt | 64 mfio11 spis
65 mfio12 spis
66 mfio13 spis
67 mfio14 spis
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| H A D | starfive,jh7110-sys-pinctrl.yaml | 16 includes a number of other UARTs, I2Cs, SPIs, PWMs etc.
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| /linux/arch/arm64/kvm/vgic/ |
| H A D | vgic-init.c | 241 * @nr_spis: number of spis, frozen by caller in kvm_vgic_dist_init()
249 if (dist->spis) in kvm_vgic_dist_init()
253 dist->spis = kzalloc_objs(struct vgic_irq, nr_spis, GFP_KERNEL_ACCOUNT);
254 if (!dist->spis)
266 struct vgic_irq *irq = &dist->spis[i]; in kvm_vgic_vcpu_nv_init()
284 kfree(dist->spis); in vgic_setup_private_irq()
285 dist->spis = NULL; in vgic_setup_private_irq()
474 * - the number of spis in vgic_init()
497 /* freeze the number of spis */ in kvm_vgic_dist_destroy()
548 kfree(dist->spis); in kvm_vgic_vcpu_destroy()
[all...] |
| H A D | vgic.c | 91 /* SPIs */ in vgic_get_irq()
101 return &kvm->arch.vgic.spis[intid]; in vgic_get_irq()
108 return &kvm->arch.vgic.spis[intid]; in vgic_get_vcpu_irq()
999 * - deactivation of SPIs can occur on any CPU, while the SPI is only
1003 * point for not trapping DIR when no SPIs are pending or active in
1006 * - LPIs do not suffer the same problem as SPIs on deactivation, as we
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| /linux/net/ipv4/netfilter/ |
| H A D | ipt_ah.c | 44 return spi_match(ahinfo->spis[0], ahinfo->spis[1], in ah_mt()
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| /linux/net/netfilter/ |
| H A D | xt_esp.c | 50 return spi_match(espinfo->spis[0], espinfo->spis[1], ntohl(eh->spi), in esp_mt()
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| H A D | xt_ipcomp.c | 54 return spi_match(compinfo->spis[0], compinfo->spis[1], in comp_mt()
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| /linux/net/ipv6/netfilter/ |
| H A D | ip6t_ah.c | 59 return spi_match(ahinfo->spis[0], ahinfo->spis[1], in ah_mt6()
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| /linux/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mt76x8.c | 95 FUNC("spis utif", 2, 14, 4),
96 FUNC("spis", 0, 14, 4),
193 GRP_G("spis", spis_grp, MT76X8_GPIO_MODE_MASK,
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| /linux/arch/arm64/boot/dts/marvell/ |
| H A D | armada-ap80x.dtsi | 115 arm,msi-num-spis = <32>;
122 arm,msi-num-spis = <32>;
129 arm,msi-num-spis = <32>;
136 arm,msi-num-spis = <32>;
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| /linux/drivers/irqchip/ |
| H A D | irq-gic-v2m.c | 36 * [9:0] Numer of SPIs assigned to MSI
71 u32 nr_spis; /* The number of SPIs for MSIs */
225 pr_err("Number of SPIs (%u) exceed maximum (%u)\n", in is_msi_spi_valid()
407 !of_property_read_u32(child, "arm,msi-num-spis", &nr_spis)) in gicv2m_of_init()
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| H A D | qcom-pdc.c | 208 * PDC allocates direct SPIs at the beginning and in pdc_pin_is_gpio()
209 * all GPIOs as SPIs are allocated after direct SPIs. in pdc_pin_is_gpio()
567 * PDC secondary chip is only set for the GPIO interrupts as SPIs. in qcom_pdc_alloc()
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| H A D | irq-hip04.c | 126 /* SPIs have restrictions on the supported types */ in hip04_irq_set_type()
332 /* For SPIs, we need to add 16 more to get the irq ID number */ in hip04_irq_domain_xlate()
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| H A D | irq-gic-common.c | 110 * Deactivate and disable all SPIs. Leave the PPI and SGIs in gic_dist_config()
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| /linux/include/uapi/linux/netfilter/ |
| H A D | xt_esp.h | 8 __u32 spis[2]; /* Security Parameter Index */ member
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| H A D | xt_ipcomp.h | 8 __u32 spis[2]; /* Security Parameter Index */ member
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| /linux/include/uapi/linux/netfilter_ipv4/ |
| H A D | ipt_ah.h | 8 __u32 spis[2]; /* Security Parameter Index */ member
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| /linux/include/uapi/linux/netfilter_ipv6/ |
| H A D | ip6t_ah.h | 8 __u32 spis[2]; /* Security Parameter Index */ member
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| /linux/kernel/bpf/ |
| H A D | liveness.c | 599 * Runs of 3+ consecutive fully-set SPIs are collapsed: "fp0-8..-24"
602 const unsigned long *spis, u32 words)
612 bool lo = test_bit(spi * 2, spis);
613 bool hi = test_bit(spi * 2 + 1, spis);
624 test_bit(spi * 2 + 2, spis) && in stack_arg_off_to_slot()
625 test_bit(spi * 2 + 3, spis) &&
626 test_bit(spi * 2 + 4, spis) && in arg_is_visited()
627 test_bit(spi * 2 + 5, spis)) { in arg_is_visited()
628 /* 3+ consecutive full spis */ in arg_is_visited()
631 test_bit((spi + 1) * 2, spis)
433 fmt_spis_mask(struct bpf_verifier_env * env,int frame,bool first,spis_t spis) fmt_spis_mask() argument
[all...] |
| /linux/Documentation/devicetree/bindings/timer/ |
| H A D | arm,arch_timer_mmio.yaml | 17 The memory mapped timer is attached to a GIC to deliver its interrupts via SPIs.
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| /linux/drivers/pinctrl/ |
| H A D | pinctrl-pistachio.c | 576 FUNCTION(spis),
690 MFIO_PIN_GROUP(11, SPIS),
691 MFIO_PIN_GROUP(12, SPIS),
692 MFIO_PIN_GROUP(13, SPIS),
693 MFIO_PIN_GROUP(14, SPIS),
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