Searched full:sgis (Results 1 – 11 of 11) sorted by relevance
138 /* Not a GICv4.1? No HW SGIs */ in vgic_mmio_write_v3_misc()148 /* Switching HW SGIs? */ in vgic_mmio_write_v3_misc()207 /* Not a GICv4.1? No HW SGIs */ in vgic_mmio_uaccess_write_v3_misc()601 * The GICv3 per-IRQ registers are split to control PPIs and SGIs in the1061 * An access targeting Group0 SGIs can only generate in vgic_v3_queue_sgi()1062 * those, while an access targeting Group1 SGIs can in vgic_v3_queue_sgi()1089 * @allow_group1: Does the sysreg access allow generation of G1 SGIs1091 * With GICv3 (and ARE=1) CPUs trigger SGIs by writing to a system register.
122 /* Interrupt configuration for SGIs can't be changed */ in hip04_irq_set_type()329 /* Get the interrupt number and add 16 to skip over SGIs */ in hip04_irq_domain_xlate()
110 * Deactivate and disable all SPIs. Leave the PPI and SGIs in gic_dist_config()
36 u32 num_spis; /* The number of SGIs for MSIs */
4372 * There is no notion of affinity for virtual SGIs, at least in its_sgi_set_affinity()4489 /* Yes, we do want 16 SGIs */ in its_sgi_irq_domain_alloc()
137 "doesn't allow injecting SGIs. There's no mask for it."); in _kvm_arm_irq_line()
336 /* Set a default priority for all the SGIs and PPIs */ in gicv3_cpu_init()
140 GICD_TYPER2.nASSGIcap allows userspace to control the support of SGIs348 SGIs and any interrupt with a higher ID than the number of interrupts
559 * The kernel silently fails for invalid SPIs and SGIs (which in kvm_irq_set_level_info_check() 612 * either trying to inject SGIs when we configured the test to be in kvm_irq_write_ispendr_check() 861 /* Configure all SGIs with decreasing priority */ in guest_code_group_en()
217 /* Skip SGIs and PPIs*/ in xgene_gpio_sb_domain_alloc()
587 /* Find GIC controller to map SGIs. */ in xlnx_event_init_sgi()