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/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dwm,wm8505-sdhc.yaml4 $id: http://devicetree.org/schemas/mmc/wm,wm8505-sdhc.yaml#
18 - const: wm,wm8505-sdhc
20 - const: wm,wm8650-sdhc
21 - const: wm,wm8505-sdhc
23 - const: wm,wm8750-sdhc
24 - const: wm,wm8505-sdhc
26 - const: wm,wm8850-sdhc
27 - const: wm,wm8505-sdhc
46 wm,wm8505-sdhc. On wm,wm8650-sdhc and later this property is implied and
60 compatible = "wm,wm8505-sdhc";
[all …]
H A Damlogic,meson-mx-sdhc.yaml4 $id: http://devicetree.org/schemas/mmc/amlogic,meson-mx-sdhc.yaml#
7 title: Amlogic Meson SDHC controller
16 The SDHC MMC host controller on Amlogic SoCs provides an eMMC and MMC
24 - amlogic,meson8-sdhc
25 - amlogic,meson8b-sdhc
26 - amlogic,meson8m2-sdhc
27 - const: amlogic,meson-mx-sdhc
60 sdhc: mmc@8e00 {
61 compatible = "amlogic,meson8-sdhc", "amlogic,meson-mx-sdhc";
H A Dmarvell,xenon-sdhci.txt6 Each SDHC is independent and owns independent resources, such as register sets,
8 Each SDHC should have an independent device tree node.
19 Array of clocks required for SDHC.
39 - marvell,xenon-sdhc-id:
40 Indicate the corresponding bit index of current SDHC in
41 SDHC System Operation Control Register Bit[7:0].
42 Set/clear the corresponding bit to enable/disable current SDHC.
43 If Xenon IP contains only one SDHC, this property is optional.
55 It doesn't stand for the entire SDHC type or property.
56 For example, "emmc 5.1 phy" doesn't mean that this Xenon SDHC only
[all …]
H A Dsdhci-msm.txt36 - CQE register map (Optional, CQE support is present on SDHC instance meant
71 - interconnect-names: For sdhc, we have two main paths.
72 1. Data path : sdhc to ddr
73 2. Config path : cpu to sdhc
75 is "sdhc-ddr" and for config interconnect path it is
76 "cpu-sdhc".
99 interconnect-names = "sdhc-ddr","cpu-sdhc";
H A Dmarvell,xenon-sdhci.yaml14 Each SDHC is independent and owns independent resources, such as register
17 Each SDHC should have an independent device tree node.
74 marvell,xenon-sdhc-id:
79 Indicate the corresponding bit index of current SDHC in SDHC System
81 enable/disable current SDHC.
96 entire SDHC type or property. For example, "emmc 5.1 phy" doesn't mean
97 that this Xenon SDHC only supports eMMC 5.1.
145 Xenon SDHC SoC usually doesn't provide re-tuning counter in
H A Dvt8500-sdmmc.txt7 - compatible: Should be "wm,wm8505-sdhc".
15 sdhc@d800a000 {
16 compatible = "wm,wm8505-sdhc";
19 clocks = <&sdhc>;
H A Dsdhci-sirf.txt7 - compatible: sirf,prima2-sdhc
15 compatible = "sirf,prima2-sdhc";
H A Dsdhci-msm.yaml149 - description: data path, sdhc to ddr
150 - description: config path, cpu to sdhc
155 - const: sdhc-ddr
156 - const: cpu-sdhc
/freebsd/sys/contrib/device-tree/src/arm/amlogic/
H A Dmeson8m2.dtsi87 &sdhc {
88 compatible = "amlogic,meson8m2-sdhc", "amlogic,meson-mx-sdhc";
H A Dmeson8-fernsehfee3.dts22 mmc0 = &sdhc;
229 &sdhc {
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dqoriq-esdhc-0.dtsi35 sdhc: sdhc@114000 { label
H A Db4420si-pre.dtsi57 sdhc = &sdhc;
H A Dt102xsi-pre.dtsi59 sdhc = &sdhc;
H A Db4860si-pre.dtsi57 sdhc = &sdhc;
H A Dt208xsi-pre.dtsi74 sdhc = &sdhc;
H A Dp5020si-pre.dtsi61 sdhc = &sdhc;
H A Dt104xsi-pre.dtsi58 sdhc = &sdhc;
H A Dp2041si-pre.dtsi60 sdhc = &sdhc;
H A Dp3041si-pre.dtsi61 sdhc = &sdhc;
H A Dp5040si-pre.dtsi60 sdhc = &sdhc;
H A Dp4080si-pre.dtsi60 sdhc = &sdhc;
H A Dt4240si-pre.dtsi64 sdhc = &sdhc;
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dvt8500.txt66 sdhc: sdhc {
/freebsd/sys/contrib/device-tree/src/arm/vt8500/
H A Dwm8650.dtsi165 clksdhc: sdhc {
196 compatible = "wm,wm8505-sdhc";
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dipq6018-mp5496.dtsi42 &sdhc {

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