| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | rockchip,rk3588-cru.yaml | 15 controller for SoC peripherals. For example it provides SCLK_UART2 and
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| H A D | rockchip,rk3128-cru.txt | 56 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
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| H A D | exynos7-clock.txt | 80 - sclk_uart2
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| H A D | samsung,exynos7-clock.yaml | 153 - const: sclk_uart2
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| /freebsd/sys/contrib/device-tree/include/dt-bindings/clock/ |
| H A D | rk3036-cru.h | 25 #define SCLK_UART2 79 macro
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| H A D | exynos7-clk.h | 97 #define SCLK_UART2 5 macro
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| H A D | s5pv210.h | 195 #define SCLK_UART2 173 macro
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| H A D | rk3188-cru-common.h | 22 #define SCLK_UART2 66 macro
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| H A D | rk3128-cru.h | 27 #define SCLK_UART2 79 macro
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| H A D | rk3228-cru.h | 26 #define SCLK_UART2 79 macro
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| H A D | rv1108-cru.h | 24 #define SCLK_UART2 74 macro
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| H A D | px30-cru.h | 27 #define SCLK_UART2 25 macro
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| H A D | rk3288-cru.h | 34 #define SCLK_UART2 79 macro
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| H A D | rk3308-cru.h | 23 #define SCLK_UART2 19 macro
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| H A D | rk3328-cru.h | 29 #define SCLK_UART2 40 macro
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| H A D | rk3368-cru.h | 32 #define SCLK_UART2 79 macro
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| H A D | rockchip,rv1126-cru.h | 86 #define SCLK_UART2 20 macro
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| H A D | rk3399-cru.h | 40 #define SCLK_UART2 83 macro
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| H A D | rockchip,rk3588-cru.h | 190 #define SCLK_UART2 175 macro
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| /freebsd/sys/dev/clk/rockchip/ |
| H A D | rk3399_cru_dt.h | 31 #define SCLK_UART2 83 macro
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| H A D | rk3288_cru.c | 686 MUX(SCLK_UART2, "sclk_uart2", uart2_p, 0,
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| H A D | rk3328_cru.c | 75 #define SCLK_UART2 40 macro
930 MUX(SCLK_UART2, "clk_uart2", mux_uart2_p, 0, 18, 8, 2),
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| /freebsd/sys/contrib/device-tree/src/arm64/exynos/ |
| H A D | exynos7.dtsi | 236 "sclk_uart2",
307 <&clock_peric1 SCLK_UART2>;
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| /freebsd/sys/contrib/device-tree/src/arm/rockchip/ |
| H A D | rk3xxx.dtsi | 428 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
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| H A D | rv1126.dtsi | 343 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
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