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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dexynos7-clock.txt82 - sclk_spi0
H A Dsamsung,exynos7-clock.yaml155 - const: sclk_spi0
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dspi-rockchip.yaml106 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dsamsung,s3c64xx-clock.h102 #define SCLK_SPI0 90 macro
H A Dexynos7-clk.h109 #define SCLK_SPI0 17 macro
H A Ds5pv210.h193 #define SCLK_SPI0 171 macro
H A Drk3188-cru-common.h25 #define SCLK_SPI0 69 macro
H A Drk3128-cru.h20 #define SCLK_SPI0 65 macro
H A Drk3228-cru.h18 #define SCLK_SPI0 65 macro
H A Drv1108-cru.h17 #define SCLK_SPI0 65 macro
H A Dpx30-cru.h38 #define SCLK_SPI0 36 macro
H A Drk3288-cru.h20 #define SCLK_SPI0 65 macro
H A Drk3308-cru.h31 #define SCLK_SPI0 27 macro
H A Drk3368-cru.h21 #define SCLK_SPI0 65 macro
H A Drk3399-cru.h28 #define SCLK_SPI0 71 macro
/freebsd/sys/dev/clk/rockchip/
H A Drk3399_cru_dt.h19 #define SCLK_SPI0 71 macro
H A Drk3288_cru.c123 GATE(SCLK_SPI0, "sclk_spi0", "sclk_spi0_s", 2, 9),
H A Drk3399_cru.c184 GATE(SCLK_SPI0, "clk_spi0", "clk_spi0_c", 9, 12),
/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3xxx.dtsi457 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
H A Drk3128.dtsi651 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
H A Drk322x.dtsi425 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Ds5pv210.dtsi158 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
/freebsd/sys/contrib/device-tree/src/arm64/exynos/
H A Dexynos7.dtsi238 "sclk_spi0",
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3368.dtsi239 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
H A Drk3308.dtsi368 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;

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