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Searched full:sclk_spdif (Results 1 – 22 of 22) sorted by relevance

/linux/sound/soc/samsung/
H A Dsmdk_spdif.c20 struct clk *fout_epll, *mout_epll, *sclk_audio0, *sclk_spdif; in set_audio_clock_heirachy() local
46 sclk_spdif = clk_get(NULL, "sclk_spdif"); in set_audio_clock_heirachy()
47 if (IS_ERR(sclk_spdif)) { in set_audio_clock_heirachy()
48 printk(KERN_WARNING "%s: Cannot find sclk_spdif.\n", in set_audio_clock_heirachy()
57 clk_set_parent(sclk_spdif, sclk_audio0); in set_audio_clock_heirachy()
59 clk_put(sclk_spdif); in set_audio_clock_heirachy()
77 struct clk *fout_epll, *sclk_spdif; in set_audio_clock_rate() local
88 sclk_spdif = clk_get(NULL, "sclk_spdif"); in set_audio_clock_rate()
[all...]
H A Dspdif.c391 spdif->sclk = devm_clk_get(&pdev->dev, "sclk_spdif"); in spdif_probe()
/linux/include/dt-bindings/clock/
H A Drk3036-cru.h27 #define SCLK_SPDIF 83 macro
H A Dexynos7-clk.h119 #define SCLK_SPDIF 27 macro
H A Ds5pv210.h187 #define SCLK_SPDIF 165 macro
H A Drk3128-cru.h30 #define SCLK_SPDIF 83 macro
H A Drk3228-cru.h30 #define SCLK_SPDIF 83 macro
H A Drk3328-cru.h35 #define SCLK_SPDIF 46 macro
H A Drk3288-cru.h38 #define SCLK_SPDIF 83 macro
/linux/drivers/clk/rockchip/
H A Dclk-rk3036.c167 MUX(SCLK_SPDIF, "sclk_spdif", mux_spdif_p, 0,
H A Dclk-rk3128.c182 MUX(SCLK_SPDIF, "sclk_spdif", mux_sclk_spdif_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3228.c196 MUX(SCLK_SPDIF, "sclk_spdif", mux_sclk_spdif_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3328.c249 MUX(SCLK_SPDIF, "sclk_spdif", mux_spdif_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3288.c382 GATE(SCLK_SPDIF, "sclk_spdif", "spdif_mux", CLK_SET_RATE_PARENT,
/linux/arch/arm/boot/dts/rockchip/
H A Drk3188.dtsi184 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
H A Drk322x.dtsi166 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF_8CH>;
H A Drk3128.dtsi448 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
/linux/drivers/clk/samsung/
H A Dclk-exynos5250.c509 GATE(CLK_SCLK_SPDIF, "sclk_spdif", "mout_spdif",
H A Dclk-exynos4.c719 GATE(CLK_SCLK_SPDIF, "sclk_spdif", "mout_spdif", SRC_MASK_PERIL1, 8, 0,
H A Dclk-exynos5420.c996 GATE(CLK_SCLK_SPDIF, "sclk_spdif", "mout_spdif",
H A Dclk-exynos5433.c1724 GATE(CLK_SCLK_SPDIF, "sclk_spdif", "sclk_spdif_peric",
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3328.dtsi282 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF_8CH>;