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/linux/Documentation/devicetree/bindings/devfreq/event/
H A Dsamsung,exynos-ppmu.yaml4 $id: http://devicetree.org/schemas/devfreq/event/samsung,exynos-ppmu.yaml#
7 title: Samsung Exynos SoC PPMU (Platform Performance Monitoring Unit)
14 The Samsung Exynos SoC has PPMU (Platform Performance Monitoring Unit) for
15 each IP. PPMU provides the primitive values to get performance data. These
16 PPMU events provide information of the SoC's behaviors so that you may use to
19 Exynos PPMU driver uses the devfreq-event class to provide event data to
26 - samsung,exynos-ppmu
27 - samsung,exynos-ppmu-v2
31 - const: ppmu
43 '^ppmu-event[0-9]+(-[a-z0-9]+){,2}$':
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/linux/arch/arm/boot/dts/samsung/
H A Dexynos4412-ppmu-common.dtsi3 * Device tree sources for Exynos4412 PPMU common device tree
13 ppmu_dmc0_3: ppmu-event3-dmc0 {
14 event-name = "ppmu-event3-dmc0";
23 ppmu_dmc1_3: ppmu-event3-dmc1 {
24 event-name = "ppmu-event3-dmc1";
33 ppmu_leftbus_3: ppmu-event3-leftbus {
34 event-name = "ppmu-event3-leftbus";
43 ppmu_rightbus_3: ppmu-event3-rightbus {
44 event-name = "ppmu-event3-rightbus";
H A Dexynos4.dtsi781 ppmu_dmc0: ppmu@106a0000 {
782 compatible = "samsung,exynos-ppmu";
785 clock-names = "ppmu";
789 ppmu_dmc1: ppmu@106b0000 {
790 compatible = "samsung,exynos-ppmu";
793 clock-names = "ppmu";
797 ppmu_cpu: ppmu@106c0000 {
798 compatible = "samsung,exynos-ppmu";
801 clock-names = "ppmu";
805 ppmu_rightbus: ppmu@112a0000 {
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H A Dexynos3250.dtsi875 ppmu_dmc0: ppmu@106a0000 {
876 compatible = "samsung,exynos-ppmu";
881 ppmu_dmc1: ppmu@106b0000 {
882 compatible = "samsung,exynos-ppmu";
887 ppmu_cpu: ppmu@106c0000 {
888 compatible = "samsung,exynos-ppmu";
893 ppmu_rightbus: ppmu@112a0000 {
894 compatible = "samsung,exynos-ppmu";
897 clock-names = "ppmu";
901 ppmu_leftbus: ppmu@116a0000 {
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H A Dexynos5420.dtsi407 ppmu_dmc0_0: ppmu@10d00000 {
408 compatible = "samsung,exynos-ppmu";
411 clock-names = "ppmu";
413 ppmu_event3_dmc0_0: ppmu-event3-dmc0-0 {
414 event-name = "ppmu-event3-dmc0-0";
419 ppmu_dmc0_1: ppmu@10d10000 {
420 compatible = "samsung,exynos-ppmu";
423 clock-names = "ppmu";
425 ppmu_event3_dmc0_1: ppmu-event3-dmc0-1 {
426 event-name = "ppmu-event3-dmc0-1";
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H A Dexynos4210.dtsi343 ppmu_acp: ppmu@10ae0000 {
344 compatible = "samsung,exynos-ppmu";
349 ppmu_lcd1: ppmu@12240000 {
350 compatible = "samsung,exynos-ppmu";
353 clock-names = "ppmu";
/linux/arch/powerpc/perf/
H A Dcore-book3s.c66 static struct power_pmu *ppmu; variable
82 * these registers (via mtspr/mfspr) are done under ppmu flag
142 if (!ppmu) in is_sier_available()
145 if (ppmu->flags & PPMU_HAS_SIER) in is_sier_available()
185 if ((ppmu->flags & PPMU_HAS_SSLOT) && (mmcra & MMCRA_SAMPLE_ENABLE)) { in perf_ip_adjust()
207 if (ppmu->flags & PPMU_HAS_SIER) in perf_get_data_addr()
212 if (ppmu->flags & PPMU_SIAR_VALID) in perf_get_data_addr()
214 else if (ppmu->flags & PPMU_ALT_SIPR) in perf_get_data_addr()
216 else if (ppmu->flags & PPMU_NO_SIAR) in perf_get_data_addr()
235 if (ppmu->flags & PPMU_HAS_SIER) in regs_sihv()
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H A Dcore-fsl-emb.c27 static struct fsl_emb_pmu *ppmu; variable
280 int num_counters = ppmu->n_counter; in fsl_emb_pmu_add()
288 num_counters = ppmu->n_restricted; in fsl_emb_pmu_add()
447 if (!ppmu->cache_events) in hw_perf_cache_event()
460 ev = (*ppmu->cache_events)[type][op][result]; in hw_perf_cache_event()
478 if (ppmu->n_counter > MAX_HWEVENTS) { in fsl_emb_pmu_event_init()
480 ppmu->n_counter, MAX_HWEVENTS); in fsl_emb_pmu_event_init()
481 ppmu->n_counter = MAX_HWEVENTS; in fsl_emb_pmu_event_init()
487 if (ev >= ppmu->n_generic || ppmu->generic_events[ev] == 0) in fsl_emb_pmu_event_init()
489 ev = ppmu->generic_events[ev]; in fsl_emb_pmu_event_init()
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/linux/drivers/devfreq/event/
H A Dexynos-ppmu.c3 * exynos_ppmu.c - Exynos PPMU (Platform Performance Monitoring Unit) support
22 #include "exynos-ppmu.h"
41 struct exynos_ppmu_data ppmu; member
46 { "ppmu-event0-"#name, PPMU_PMNCNT0 }, \
47 { "ppmu-event1-"#name, PPMU_PMNCNT1 }, \
48 { "ppmu-event2-"#name, PPMU_PMNCNT2 }, \
49 { "ppmu-event3-"#name, PPMU_PMNCNT3 }
126 * The devfreq-event ops structure for PPMU v1.1
144 /* Disable PPMU */ in exynos_ppmu_disable()
183 /* Reset cycle counter/performance counter and enable PPMU */ in exynos_ppmu_set_event()
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H A DKconfig27 tristate "Exynos PPMU (Platform Performance Monitoring Unit) DEVFREQ event Driver"
31 This add the devfreq-event driver for Exynos SoC. It provides PPMU
H A DMakefile5 obj-$(CONFIG_DEVFREQ_EVENT_EXYNOS_PPMU) += exynos-ppmu.o
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dsamsung,exynos5422-dmc.yaml19 controller in runtime, the driver uses the PPMU (Platform Performance
50 description: phandles of the PPMU events used by the controller.
99 ppmu_dmc0_0: ppmu@10d00000 {
100 compatible = "samsung,exynos-ppmu";
103 clock-names = "ppmu";
105 ppmu_event_dmc0_0: ppmu-event3-dmc0-0 {
106 event-name = "ppmu-event3-dmc0_0";
/linux/Documentation/devicetree/bindings/interconnect/
H A Dsamsung,exynos-bus.yaml18 monitor the usage of each bus in runtime, the driver uses the PPMU (Platform
259 ppmu_dmc0: ppmu@106a0000 {
260 compatible = "samsung,exynos-ppmu";
263 ppmu_dmc0_3: ppmu-event3-dmc0 {
264 event-name = "ppmu-event3-dmc0";
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
H A Dbase.c161 enum nvkm_subdev_type type, int inst, struct nvkm_pmu **ppmu) in nvkm_pmu_new_() argument
164 if (!(pmu = *ppmu = kzalloc(sizeof(*pmu), GFP_KERNEL))) in nvkm_pmu_new_()
166 return nvkm_pmu_ctor(fwif, device, type, inst, *ppmu); in nvkm_pmu_new_()
H A Dgf119.c51 struct nvkm_pmu **ppmu) in gf119_pmu_new() argument
53 return nvkm_pmu_new_(gf119_pmu_fwif, device, type, inst, ppmu); in gf119_pmu_new()
H A Dgm107.c53 struct nvkm_pmu **ppmu) in gm107_pmu_new() argument
55 return nvkm_pmu_new_(gm107_pmu_fwif, device, type, inst, ppmu); in gm107_pmu_new()
H A Dgk208.c52 struct nvkm_pmu **ppmu) in gk208_pmu_new() argument
54 return nvkm_pmu_new_(gk208_pmu_fwif, device, type, inst, ppmu); in gk208_pmu_new()
H A Dgp102.c57 struct nvkm_pmu **ppmu) in gp102_pmu_new() argument
62 return nvkm_pmu_new_(gp102_pmu_fwif, device, type, inst, ppmu); in gp102_pmu_new()
H A Dgf100.c73 struct nvkm_pmu **ppmu) in gf100_pmu_new() argument
75 return nvkm_pmu_new_(gf100_pmu_fwif, device, type, inst, ppmu); in gf100_pmu_new()
H A Dgp10b.c93 struct nvkm_pmu **ppmu) in gp10b_pmu_new() argument
95 return nvkm_pmu_new_(gp10b_pmu_fwif, device, type, inst, ppmu); in gp10b_pmu_new()
H A Dgm200.c82 struct nvkm_pmu **ppmu) in gm200_pmu_new() argument
84 return nvkm_pmu_new_(gm200_pmu_fwif, device, type, inst, ppmu); in gm200_pmu_new()
H A Dgk110.c110 struct nvkm_pmu **ppmu) in gk110_pmu_new() argument
112 return nvkm_pmu_new_(gk110_pmu_fwif, device, type, inst, ppmu); in gk110_pmu_new()
H A Dgk104.c131 struct nvkm_pmu **ppmu) in gk104_pmu_new() argument
133 return nvkm_pmu_new_(gk104_pmu_fwif, device, type, inst, ppmu); in gk104_pmu_new()
H A Dgk20a.c213 struct nvkm_pmu **ppmu) in gk20a_pmu_new() argument
220 *ppmu = &pmu->base; in gk20a_pmu_new()
/linux/include/dt-bindings/pmu/
H A Dexynos_ppmu.h3 * Samsung Exynos PPMU event types for counting in regs

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