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/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Ds3c2443.h74 #define PCLK_SPI0 78 macro
H A Dsamsung,s3c64xx-clock.h68 #define PCLK_SPI0 53 macro
H A Dexynos7-clk.h104 #define PCLK_SPI0 12 macro
H A Drk3188-cru-common.h80 #define PCLK_SPI0 328 macro
H A Drk3128-cru.h107 #define PCLK_SPI0 338 macro
H A Drk3228-cru.h106 #define PCLK_SPI0 338 macro
H A Dpx30-cru.h164 #define PCLK_SPI0 341 macro
H A Drk3288-cru.h130 #define PCLK_SPI0 338 macro
H A Drk3308-cru.h186 #define PCLK_SPI0 207 macro
H A Drk3368-cru.h122 #define PCLK_SPI0 338 macro
H A Drockchip,rv1126-cru.h50 #define PCLK_SPI0 37 macro
H A Drk3399-cru.h242 #define PCLK_SPI0 347 macro
H A Drockchip,rk3588-cru.h161 #define PCLK_SPI0 146 macro
H A Drk3568-cru.h400 #define PCLK_SPI0 337 macro
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dspi-rockchip.yaml106 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
/freebsd/sys/dev/clk/rockchip/
H A Drk3399_cru_dt.h227 #define PCLK_SPI0 347 macro
H A Drk3288_cru.c198 GATE(PCLK_SPI0, "pclk_spi0", "pclk_peri", 6, 4),
H A Drk3399_cru.c391 GATE(PCLK_SPI0, "pclk_spi0", "pclk_perilp1", 23, 10),
H A Drk3568_cru.c1298 GATE(PCLK_SPI0, "pclk_spi0", "pclk_bus", 30, 10),
/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3xxx.dtsi457 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
H A Drk3128.dtsi651 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
H A Drk322x.dtsi425 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
H A Drk3288.dtsi287 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3368.dtsi239 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
H A Drk3308.dtsi368 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;

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