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/linux/tools/testing/selftests/bpf/progs/
H A Dverifier_sdiv.c1 // SPDX-License-Identifier: GPL-2.0
15 __description("SDIV32, non-zero imm divisor, check 1")
16 __success __success_unpriv __retval(-20)
19 asm volatile (" \ in sdiv32_non_zero_imm_1()
20 w0 = -41; \ in sdiv32_non_zero_imm_1()
27 __description("SDIV32, non-zero imm divisor, check 2")
28 __success __success_unpriv __retval(-20)
31 asm volatile (" \ in sdiv32_non_zero_imm_2()
33 w0 s/= -2; \ in sdiv32_non_zero_imm_2()
39 __description("SDIV32, non-zero imm divisor, check 3")
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H A Dverifier_bounds_deduction_non_const.c1 // SPDX-License-Identifier: GPL-2.0
8 __description("check deducing bounds from non-const, jmp64, <non_const> == <const>, 1")
12 asm volatile (" \ in deducing_bounds_from_non_const_1()
21 r0 -= r1; \ in deducing_bounds_from_non_const_1()
29 __description("check deducing bounds from non-const, jmp64, <non_const> == <const>, 2")
33 asm volatile (" \ in deducing_bounds_from_non_const_2()
42 r0 -= r1; \ in deducing_bounds_from_non_const_2()
50 __description("check deducing bounds from non-const, jmp64, <non_const> != <const>, 1")
54 asm volatile (" \ in deducing_bounds_from_non_const_3()
64 r0 -= r1; \ in deducing_bounds_from_non_const_3()
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H A Dverifier_cgroup_storage.c1 // SPDX-License-Identifier: GPL-2.0
35 asm volatile (" \ in valid_cgroup_storage_access()
55 asm volatile (" \ in invalid_cgroup_storage_access_1()
75 asm volatile (" \ in invalid_cgroup_storage_access_2()
94 asm volatile (" \ in invalid_cgroup_storage_access_3()
110 __failure __msg("invalid access to map value, value_size=64 off=-2 size=4")
115 asm volatile (" \ in __flag()
119 r1 = *(u32*)(r0 - 2); \ in __flag()
131 __failure __msg("get_local_storage() doesn't support non-zero flags")
135 asm volatile (" \ in invalid_cgroup_storage_access_5()
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/linux/Documentation/translations/it_IT/process/
H A Dvolatile-considered-harmful.rst1 .. include:: ../disclaimer-ita.rst
3 :Original: :ref:`Documentation/process/volatile-considered-harmful.rst <volatile_considered_harmful…
8 Perché la parola chiave "volatile" non dovrebbe essere usata
9 ------------------------------------------------------------
13 a volte saranno tentati dall'utilizzare *volatile* nel kernel per le
15 *volatile* come una variabile atomica di facile utilizzo, ma non è così.
16 L'uso di *volatile* nel kernel non è quasi mai corretto; questo documento ne
19 Il punto chiave da capire su *volatile* è che il suo scopo è quello di
20 sopprimere le ottimizzazioni, che non è quasi mai quello che si vuole.
27 Come *volatile*, le primitive del kernel che rendono sicuro l'accesso ai dati
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/linux/include/asm-generic/bitops/
H A Dinstrumented-non-atomic.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * This file provides wrappers with sanitizer instrumentation for non-atomic
17 * ___set_bit - Set a bit in memory
21 * Unlike set_bit(), this function is non-atomic. If it is called on the same
26 ___set_bit(unsigned long nr, volatile unsigned long *addr) in ___set_bit()
33 * ___clear_bit - Clears a bit in memory
37 * Unlike clear_bit(), this function is non-atomic. If it is called on the same
42 ___clear_bit(unsigned long nr, volatile unsigned long *addr) in ___clear_bit()
49 * ___change_bit - Toggle a bit in memory
53 * Unlike change_bit(), this function is non-atomic. If it is called on the same
[all …]
H A Dgeneric-non-atomic.h1 /* SPDX-License-Identifier: GPL-2.0-only */
19 * generic___set_bit - Set a bit in memory
23 * Unlike set_bit(), this function is non-atomic and may be reordered.
28 generic___set_bit(unsigned long nr, volatile unsigned long *addr) in generic___set_bit()
37 generic___clear_bit(unsigned long nr, volatile unsigned long *addr) in generic___clear_bit()
46 * generic___change_bit - Toggle a bit in memory
50 * Unlike change_bit(), this function is non-atomic and may be reordered.
55 generic___change_bit(unsigned long nr, volatile unsigned long *addr) in generic___change_bit()
64 * generic___test_and_set_bit - Set a bit and return its old value
68 * This operation is non-atomic and can be reordered.
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/linux/tools/include/asm-generic/bitops/
H A Dnon-atomic.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * ___set_bit - Set a bit in memory
12 * Unlike set_bit(), this function is non-atomic and may be reordered.
17 ___set_bit(unsigned long nr, volatile unsigned long *addr) in ___set_bit()
26 ___clear_bit(unsigned long nr, volatile unsigned long *addr) in ___clear_bit()
35 * ___change_bit - Toggle a bit in memory
39 * Unlike change_bit(), this function is non-atomic and may be reordered.
44 ___change_bit(unsigned long nr, volatile unsigned long *addr) in ___change_bit()
53 * ___test_and_set_bit - Set a bit and return its old value
57 * This operation is non-atomic and can be reordered.
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/linux/arch/alpha/include/asm/
H A Dbitops.h1 /* SPDX-License-Identifier: GPL-2.0 */
17 * These have to be done with inline assembly: that way the bit-setting
29 set_bit(unsigned long nr, volatile void * addr) in set_bit()
47 * WARNING: non atomic version.
50 arch___set_bit(unsigned long nr, volatile unsigned long *addr) in arch___set_bit()
58 clear_bit(unsigned long nr, volatile void * addr) in clear_bit()
76 clear_bit_unlock(unsigned long nr, volatile void * addr) in clear_bit_unlock()
83 * WARNING: non atomic version.
86 arch___clear_bit(unsigned long nr, volatile unsigned long *addr) in arch___clear_bit()
94 __clear_bit_unlock(unsigned long nr, volatile void * addr) in __clear_bit_unlock()
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/linux/Documentation/block/
H A Dwriteback_cache_control.rst2 Explicit volatile write back cache control
6 ------------
8 Many storage devices, especially in the consumer market, come with volatile
10 operating system before data actually has hit the non-volatile storage. This
12 system needs to force data out to the non-volatile storage when it performs
21 ----------------------
24 the filesystem and will make sure the volatile cache of the storage device
26 guarantees that previously completed write requests are on non-volatile
34 ------------------
38 signaled after the data has been committed to non-volatile storage.
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/linux/arch/hexagon/include/asm/
H A Dbitops.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
20 * (i.e. I get to shift by #5-2 (32 bits per long, 4 bytes per access),
27 * test_and_clear_bit - clear a bit and return its old value
31 static inline int test_and_clear_bit(int nr, volatile void *addr) in test_and_clear_bit()
51 * test_and_set_bit - set a bit and return its old value
55 static inline int test_and_set_bit(int nr, volatile void *addr) in test_and_set_bit()
77 * test_and_change_bit - toggle a bit and return its old value
81 static inline int test_and_change_bit(int nr, volatile void *addr) in test_and_change_bit()
106 static inline void clear_bit(int nr, volatile void *addr) in clear_bit()
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/linux/arch/powerpc/kvm/
H A Dtm.S1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #include <asm/asm-offsets.h>
20 * Save transactional state and TM-related registers.
22 * - r3 pointing to the vcpu struct
23 * - r4 containing the MSR with current TS bits:
25 * - r5 containing a flag indicating that non-volatile registers
34 stdu r1, -SWITCH_FRAME_SIZE(r1)
43 rldimi r8, r0, MSR_TM_LG, 63-MSR_TM_LG
48 rldicl. r4, r4, 64 - MSR_TS_S_LG, 62
54 /* Save CR on the stack - even if r5 == 0 we need to get cr7 back. */
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/linux/arch/sh/include/asm/
H A Dbitops-op32.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * The bit modifying instructions on SH-2A are only capable of working
9 * with a 3-bit immediate, which signifies the shift position for the bit
13 #define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7)
22 arch___set_bit(unsigned long nr, volatile unsigned long *addr) in arch___set_bit()
40 arch___clear_bit(unsigned long nr, volatile unsigned long *addr) in arch___clear_bit()
59 * arch___change_bit - Toggle a bit in memory
63 * Unlike change_bit(), this function is non-atomic and may be reordered.
68 arch___change_bit(unsigned long nr, volatile unsigned long *addr) in arch___change_bit()
87 * arch___test_and_set_bit - Set a bit and return its old value
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H A Dbitops-cas.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 static inline unsigned __bo_cas(volatile unsigned *p, unsigned old, unsigned new) in __bo_cas()
14 static inline void set_bit(int nr, volatile void *addr) in set_bit()
17 volatile unsigned *a = addr; in set_bit()
26 static inline void clear_bit(int nr, volatile void *addr) in clear_bit()
29 volatile unsigned *a = addr; in clear_bit()
38 static inline void change_bit(int nr, volatile void *addr) in change_bit()
41 volatile unsigned *a = addr; in change_bit()
50 static inline int test_and_set_bit(int nr, volatile void *addr) in test_and_set_bit()
53 volatile unsigned *a = addr; in test_and_set_bit()
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/linux/Documentation/driver-api/cxl/platform/example-configurations/
H A Dflexible.rst1 .. SPDX-License-Identifier: GPL-2.0
15 * Cross-Bridge interleave is described in one CFMWS that covers all capacity.
16 * One CFMWS is also described per-host bridge.
17 * One CFMWS is also described per-device.
152 Non-Volatile : 0
164 Non-Volatile : 0
176 Non-Volatile : 0
188 Non-Volatile : 0
200 Non-Volatile : 0
212 Non-Volatile : 0
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/linux/Documentation/devicetree/bindings/iio/potentiometer/
H A Dmicrochip,mcp4531.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <peda@axentia.se>
15 * volatile https://ww1.microchip.com/downloads/en/DeviceDoc/22096b.pdf
16 * non-volatile https://ww1.microchip.com/downloads/en/DeviceDoc/22107B.pdf
17 Part numbers as follows: mcp4ABC-XXX where
19 B = 3 (7-bit, volatile), 4 (7-bit, non-volatile),
20 5 (8-bit, volatile), 6 (8-bit, non-volatile),
28 - microchip,mcp4531-502
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/linux/arch/riscv/include/asm/
H A Dbitops.h1 /* SPDX-License-Identifier: GPL-2.0-only */
19 #include <asm-generic/bitops/__ffs.h>
20 #include <asm-generic/bitops/__fls.h>
21 #include <asm-generic/bitops/ffs.h>
22 #include <asm-generic/bitops/fls.h>
30 #include <asm-generic/bitops/__ffs.h>
31 #include <asm-generic/bitops/__fls.h>
32 #include <asm-generic/bitops/ffs.h>
33 #include <asm-generic/bitops/fls.h>
35 #include <asm/alternative-macros.h>
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/linux/arch/powerpc/lib/
H A Dtest_emulate_step_exec_instr.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Non-emulated single-stepping support (currently limited to basic integer
9 #include <asm/asm-offsets.h>
11 #include <asm/code-patching-asm.h>
19 * In-memory pt_regs (SP + STACK_INT_FRAME_REGS)
26 * states in an in-memory pt_regs and also create the back chain to
29 stdu r1, -INT_FRAME_SIZE(r1)
32 * Save non-volatile GPRs on stack. This includes TOC pointer (GPR2)
52 * even though only fields 2 to 4 are non-volatile.
59 * critical non-volatile registers. The register state is passed as a
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/linux/Documentation/ABI/testing/
H A Dsysfs-bus-nfit10 (RO) Serial number of the NVDIMM (non-volatile dual in-line
54 (RO) The flags in the NFIT memory device sub-structure indicate
80 only expect one code per-dimm as they will ignore
113 http://pmem.io/documents/NVDIMM_DSM_Interface-V1.6.pdf
114 https://github.com/HewlettPackard/hpe-nvm/blob/master/Documentation/
132 (RO) Sub-system vendor id of the NVDIMM non-volatile memory
141 (RO) Sub-system revision id of the NVDIMM non-volatile memory subsystem
142 controller, assigned by the non-volatile memory subsystem
151 (RO) Sub-system device id for the NVDIMM non-volatile memory
152 subsystem controller, assigned by the non-volatile memory
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/linux/drivers/scsi/
H A Dgvp11.h1 /* SPDX-License-Identifier: GPL-2.0 */
24 * if the transfer address ANDed with this results in a non-zero
31 volatile unsigned short CNTR;
33 volatile unsigned char SASR;
35 volatile unsigned char SCMD;
37 volatile unsigned short BANK;
39 volatile unsigned long ACR;
40 volatile unsigned short secret1; /* store 0 here */
41 volatile unsigned short ST_DMA;
42 volatile unsigned short SP_DMA;
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H A Da2091.h1 /* SPDX-License-Identifier: GPL-2.0 */
24 * if the transfer address ANDed with this results in a non-zero
31 volatile unsigned short ISTR;
32 volatile unsigned short CNTR;
34 volatile unsigned int WTC;
35 volatile unsigned long ACR;
37 volatile unsigned short DAWR;
39 volatile unsigned char SASR;
41 volatile unsigned char SCMD;
43 volatile unsigned short ST_DMA;
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H A Da3000.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 * Header file for the Amiga 3000 built-in SCSI controller for Linux
24 * if the transfer address ANDed with this results in a non-zero
31 volatile unsigned short DAWR;
32 volatile unsigned int WTC;
34 volatile unsigned short CNTR;
35 volatile unsigned long ACR;
37 volatile unsigned short ST_DMA;
39 volatile unsigned short FLUSH;
41 volatile unsigned short CINT;
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/linux/Documentation/arch/arm/
H A Dkernel_user_helpers.rst2 Kernel-provided User Helpers
43 --------------------
77 -------------
114 - Valid only if __kuser_helper_version >= 1 (from kernel version 2.6.12).
117 -------------
123 int __kuser_cmpxchg(int32_t oldval, int32_t newval, volatile int32_t *ptr);
134 r0 = success code (zero or non-zero)
144 Return zero if `*ptr` was changed or non-zero if no exchange happened.
150 typedef int (__kuser_cmpxchg_t)(int oldval, int newval, volatile int *ptr);
153 int atomic_add(volatile int *ptr, int val)
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/linux/arch/x86/include/asm/
H A Dspecial_insns.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 #include <asm/processor-flags.h>
18 asm volatile("mov %%cr0,%0" : "=r" (val)); in native_read_cr0()
25 asm volatile("mov %%cr2,%0" : "=r" (val)); in native_read_cr2()
31 asm volatile("mov %0,%%cr2": : "r" (val) : "memory"); in native_write_cr2()
37 asm volatile("mov %%cr3,%0" : "=r" (val)); in __native_read_cr3()
43 asm volatile("mov %0,%%cr3": : "r" (val) : "memory"); in native_write_cr3()
51 * This could fault if CR4 does not exist. Non-existent CR4 in native_read_cr4()
55 asm volatile("1: mov %%cr4, %0\n" in native_read_cr4()
61 asm volatile("mov %%cr4,%0" : "=r" (val)); in native_read_cr4()
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/linux/tools/arch/x86/include/asm/
H A Dcmpxchg.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Non-existant functions to indicate usage errors at link time
9 * (or compile-time if the compiler implements __compiletime_error().
15 * Constants for operation sizes. On 32-bit, the 64-bit size it set to
16 * -1 because sizeof will never return -1, thereby making those switch
27 #define __X86_CASE_Q -1 /* sizeof will never return -1 */
43 volatile u8 *__ptr = (volatile u8 *)(ptr); \
44 asm volatile(lock "cmpxchgb %2,%1" \
52 volatile u16 *__ptr = (volatile u16 *)(ptr); \
53 asm volatile(lock "cmpxchgw %2,%1" \
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/linux/tools/testing/selftests/powerpc/tm/
H A Dtm-signal-context-chk-gpr.c1 // SPDX-License-Identifier: GPL-2.0-or-later
32 #define NV_GPR_REGS 18 /* Number of non-volatile GPR registers */
33 #define R14 14 /* First non-volatile register to check in r14-r31 subset */
39 /* Test only non-volatile general purpose registers, i.e. r14-r31 */
41 /* First context will be set with these values, i.e. non-speculative */
46 -1,-2,-3,-4,-5,-6,-7,-8,-9,-10,-11,-12,-13,-14,-15,-16,-17,-18
53 ucontext_t *tm_ucp = ucp->uc_link; in signal_usr1()
57 fail = (ucp->uc_mcontext.gp_regs[R14 + i] != gprs[i]); in signal_usr1()
61 R14 + i, ucp->uc_mcontext.gp_regs[R14 + i], gprs[i]); in signal_usr1()
67 fail = (tm_ucp->uc_mcontext.gp_regs[R14 + i] != gprs[NV_GPR_REGS + i]); in signal_usr1()
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