| /linux/drivers/leds/rgb/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
6 tristate "LEDs group multi-color support"
11 different colors are physically grouped in a single multi-color LED
12 and driven by a controller that doesn't have multi-color support.
15 will be called leds-group-multicolor.
24 It is a 3 or 4 channel LED driver programmed via an I2C interface.
27 will be called leds-ktd202x.
38 will be called leds-ncp5623.
41 tristate "PWM driven multi-color LED Support"
48 will be called leds-pwm-multicolor.
[all …]
|
| /linux/Documentation/sound/cards/ |
| H A D | cmipci.rst | 2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
13 DACs, both streams are handled independently unlike the 4/6ch multi-
14 channel playbacks in the section below.
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
30 The rear output can be heard only when "Four Channel Mode" switch is
35 When "Four Channel Mode" switch is off, the output from rear speakers
43 front one) and was so excited. It was even with "Four Channel" bit
[all …]
|
| /linux/Documentation/devicetree/bindings/soc/ti/ |
| H A D | keystone-navigator-qmss.txt | 5 multi-core Navigator. QMSS consist of queue managers, packed-data structure
9 management of the packet queues. Packets are queued/de-queued by writing or
20 - compatible : Must be "ti,keystone-navigator-qmss".
21 : Must be "ti,66ak2g-navss-qm" for QMSS on K2G SoC.
22 - clocks : phandle to the reference clock for this device.
23 - queue-range : <start number> total range of queue numbers for the device.
24 - linkram0 : <address size> for internal link ram, where size is the total
26 - linkram1 : <address size> for external link ram, where size is the total
29 - qmgrs : child node describing the individual queue managers on the
32 -- managed-queues : the actual queues managed by each queue manager
[all …]
|
| /linux/Documentation/sound/hd-audio/ |
| H A D | controls.rst | 2 HD-Audio Codec-Specific Mixer Controls
6 This file explains the codec-specific mixer controls.
9 --------------
11 Channel Mode
12 This is an enum control to change the surround-channel setup,
16 jack-retasking of multi-I/O jacks.
18 Auto-Mute Mode
19 This is an enum control to change the auto-mute behavior of the
20 headphone and line-out jacks. If built-in speakers and headphone
21 and/or line-out jacks are available on a machine, this controls
[all …]
|
| /linux/sound/pci/hda/ |
| H A D | hda_generic.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Generic BIOS auto-parser helper functions for HD-audio
16 /* table entry for multi-io paths */
18 hda_nid_t pin; /* multi-io widget pin NID */
20 unsigned int ctl_in; /* cached input-pin control value */
25 * For output, stored in the order of DAC -> ... -> pin,
26 * for input, pin -> ... -> ADC.
30 * multi[] indicates whether it's a selector widget with multi-connectors
48 unsigned char multi[MAX_NID_PATH_DEPTH]; member
56 /* mic/line-in auto switching entry */
[all …]
|
| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | microchip,sama7g5-i2smcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/microchip,sama7g5-i2smcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip I2S Multi-Channel Controller
10 - Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
13 The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and
15 multi-channel audio codecs. It consists of a receiver, a transmitter and a
19 multi-channel is supported by using multiple data pins, output and
23 "#sound-dai-cells":
[all …]
|
| /linux/Documentation/fb/ |
| H A D | viafb.rst | 6 --------
15 ---------------
34 ----------------------
47 - 640x480 (default)
48 - 720x480
49 - 800x600
50 - 1024x768
53 - 8, 16, 32 (default:32)
56 - 60, 75, 85, 100, 120 (default:60)
59 - 0 : expansion (default)
[all …]
|
| /linux/sound/soc/sof/ |
| H A D | ipc4-topology.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
15 #define SOF_IPC4_FW_PAGE(x) ((((x) + BIT(12) - 1) & ~(BIT(12) - 1)) >> 12)
16 #define SOF_IPC4_FW_ROUNDUP(x) (((x) + BIT(6) - 1) & (~(BIT(6) -
326 u32 channel; global() member
[all...] |
| /linux/sound/soc/atmel/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SoC Audio for the Atmel System-on-Chip"
31 in PDC mode configured using audio-graph-card in device-tree.
40 in DMA mode configured using audio-graph-card in device-tree.
43 tristate "SoC Audio support for WM8731-based At91sam9g20 evaluation board"
49 Say Y if you want to add support for SoC audio on WM8731-based
63 tristate "SoC Audio support for WM8731-based at91sam9x5 board"
91 tristate "ASoC driver for the Axentia TSE-850"
98 Axentia TSE-850 with a PCM5142 codec.
110 tristate "Support for Mikroe-PROTO board"
[all …]
|
| /linux/drivers/eisa/ |
| H A D | eisa.ids | 6 # Marc Zyngier <maz@wild-wind.fr.eu.org>
10 ABP0510 "Advansys ABP-510 ISA SCSI Host Adapter"
11 ABP0540 "Advansys ABP-540/542 ISA SCSI Host Adapter"
12 ABP7401 "AdvanSys ABP-740/742 EISA Single Channel SCSI Host Adapter"
13 ABP7501 "AdvanSys ABP-750/752 EISA Dual Channel SCSI Host Adapter"
14 ACC1200 "ACCTON EtherCombo-32 Ethernet Adapter"
15 ACC120A "ACCTON EtherCombo-32 Ethernet Adapter"
25 ACE7010 "ACME Multi-Function Board"
39 ACR1711 "AcerFrame 1000 486/33 SYSTEM-2"
41 ACR3211 "AcerFrame 3000MP 486 SYSTEM-1"
[all …]
|
| /linux/include/xen/interface/io/ |
| H A D | blkif.h | 1 /* SPDX-License-Identifier: MIT */
5 * Unified block-device I/O interface for Xen guest OSes.
7 * Copyright (c) 2003-2004, Keir Fraser
17 * Front->back notifications: When enqueuing a new request, sending a
19 * hold-off mechanism provided by the ring macros). Backends must set
22 * Back->front notifications: When enqueuing a new response, sending a
24 * hold-off mechanism provided by the ring macros). Frontends must set
33 * If supported, the backend will write the key "multi-queue-max-queues" to
37 * key "multi-queue-num-queues" with the number they wish to use, which must be
39 * "multi-queue-max-queues".
[all …]
|
| /linux/Documentation/devicetree/bindings/timer/ |
| H A D | renesas,mtu2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas Multi-Function Timer Pulse Unit 2 (MTU2)
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
14 The MTU2 is a multi-purpose, multi-channel timer/counter with configurable clock inputs
23 - enum:
24 - renesas,mtu2-r7s72100 # RZ/A1H
25 - const: renesas,mtu2
[all …]
|
| /linux/sound/soc/sprd/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
11 tristate "Spreadtrum multi-channel data transfer support"
14 Say y here to enable multi-channel data transfer support. It
|
| /linux/arch/powerpc/boot/dts/ |
| H A D | turris1x.dts | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright 2013 - 2022 CZ.NIC z.s.p.o. (http://www.nic.cz/)
8 * and available at: https://docs.turris.cz/hw/turris-1x/turris-1x/
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/leds/common.h>
14 /include/ "fsl/p2020si-pre.dtsi"
41 gpio-controller@18 {
45 #gpio-cells = <2>;
46 gpio-controller;
[all …]
|
| /linux/Documentation/devicetree/bindings/leds/ |
| H A D | leds-lp55xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-lp55xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Pavel Machek <pavel@ucw.cz>
14 Bindings for the TI/National Semiconductor LP55xx and LP8501 multi channel
27 - national,lp5521
28 - national,lp5523
29 - ti,lp55231
[all …]
|
| H A D | leds-lp50xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-lp50xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Davis <afd@ti.com>
13 The LP50XX is multi-channel, I2C RGB LED Drivers that can group RGB LEDs into
27 - ti,lp5009
28 - ti,lp5012
29 - ti,lp5018
30 - ti,lp5024
[all …]
|
| /linux/drivers/pwm/ |
| H A D | pwm-bcm-iproc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
29 #define IPROC_PWM_PRESCALE_SHIFT(ch) ((3 - (ch)) * \
46 static void iproc_pwmc_enable(struct iproc_pwmc *ip, unsigned int channel) in iproc_pwmc_enable() argument
50 value = readl(ip->base + IPROC_PWM_CTRL_OFFSET); in iproc_pwmc_enable()
51 value |= 1 << IPROC_PWM_CTRL_EN_SHIFT(channel); in iproc_pwmc_enable()
52 writel(value, ip->base + IPROC_PWM_CTRL_OFFSET); in iproc_pwmc_enable()
58 static void iproc_pwmc_disable(struct iproc_pwmc *ip, unsigned int channel) in iproc_pwmc_disable() argument
62 value = readl(ip->base + IPROC_PWM_CTRL_OFFSET); in iproc_pwmc_disable()
63 value &= ~(1 << IPROC_PWM_CTRL_EN_SHIFT(channel)); in iproc_pwmc_disable()
64 writel(value, ip->base + IPROC_PWM_CTRL_OFFSET); in iproc_pwmc_disable()
[all …]
|
| /linux/Documentation/devicetree/bindings/iio/dac/ |
| H A D | adi,ad5696.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD5696 and similar I2C multi-channel DACs
10 - Michael Auchter <michael.auchter@ni.com>
13 Binding for Analog Devices AD5696 and similar multi-channel DACs
18 - adi,ad5311r
19 - adi,ad5337r
20 - adi,ad5338r
21 - adi,ad5671r
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/sapphirerapids/ |
| H A D | uncore-memory.json | 3 "BriefDescription": "Cycles - at UCLK",
228 "BriefDescription": "Multi-socket cacheline Directory lookups (any state found)",
238 "BriefDescription": "Multi-socket cacheline Directory lookups (cacheline found in A state)",
248 "BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in I state)",
258 "BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in S state)",
348 "BriefDescription": "Multi-socket cacheline Directory update from A to I",
358 "BriefDescription": "Multi-socket cacheline Directory update from A to S",
368 "BriefDescription": "Multi-socket cacheline Directory update from/to Any state",
377 "BriefDescription": "Multi-socket cacheline Directory Updates",
390 "BriefDescription": "Multi-socket cacheline Directory Updates",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/emeraldrapids/ |
| H A D | uncore-memory.json | 3 "BriefDescription": "Cycles - at UCLK",
228 "BriefDescription": "Multi-socket cacheline Directory lookups (any state found)",
238 "BriefDescription": "Multi-socket cacheline Directory lookups (cacheline found in A state)",
248 "BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in I state)",
258 "BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in S state)",
348 "BriefDescription": "Multi-socket cacheline Directory update from A to I",
358 "BriefDescription": "Multi-socket cacheline Directory update from A to S",
368 "BriefDescription": "Multi-socket cacheline Directory update from/to Any state",
377 "BriefDescription": "Multi-socket cacheline Directory Updates",
390 "BriefDescription": "Multi-socket cacheline Directory Updates",
[all …]
|
| /linux/Documentation/mm/ |
| H A D | multigen_lru.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Multi-Gen LRU
6 The multi-gen LRU is an alternative LRU implementation that optimizes
14 ----------
20 * Simple self-correcting heuristics
23 implementations. In the multi-gen LRU, each generation represents a
25 (time-based) common frame of reference and therefore help make better
41 choices; thus self-correction is necessary.
43 The benefits of simple self-correcting heuristics are self-evident.
51 -----------
[all …]
|
| /linux/include/linux/soundwire/ |
| H A D | sdw_intel.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
43 #define SDW_SHIM_SYNC_SYNCPRD_VAL_24 (24000 / SDW_CADENCE_GSYNC_KHZ - 1)
44 #define SDW_SHIM_SYNC_SYNCPRD_VAL_24_576 (24576 / SDW_CADENCE_GSYNC_KHZ - 1)
45 #define SDW_SHIM_SYNC_SYNCPRD_VAL_38_4 (38400 / SDW_CADENCE_GSYNC_KHZ - 1)
46 #define SDW_SHIM_SYNC_SYNCPRD_VAL_96 (96000 / SDW_CADENCE_GSYNC_KHZ - 1)
53 /* Control stream capabililities and channel mask */
67 /* PCM Stream Channel Map */
70 /* PCM Stream Channel Count */
117 * ACE2.x definitions for SHIM registers - only accessible when the
[all …]
|
| /linux/arch/arm/boot/dts/aspeed/ |
| H A D | aspeed-bmc-facebook-greatlakes.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/leds/leds-pca955x.h>
8 #include <dt-bindings/i2c/i2c.h>
12 compatible = "facebook,greatlakes-bmc", "aspeed,ast2600";
23 iio-hwmon {
24 compatible = "iio-hwmon";
25 io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
[all …]
|
| /linux/Documentation/driver-api/dmaengine/ |
| H A D | dmatest.rst | 15 The dmatest module can be configured to test a specific channel. It can also
17 competing for the same channel.
21 capability of the following: DMA_MEMCPY (memory-to-memory), DMA_MEMSET
22 (const-to-memory or memory-to-memory, when emulated), DMA_XOR, DMA_PQ.
28 Part 1 - How to build the test module
33 Device Drivers -> DMA Engine support -> DMA Test client
38 Part 2 - When dmatest is built as a module
43 % modprobe dmatest timeout=2000 iterations=1 channel=dma0chan0 run=1
50 % echo dma0chan0 > /sys/module/dmatest/parameters/channel
55 dmatest.timeout=2000 dmatest.iterations=1 dmatest.channel=dma0chan0 dmatest.run=1
[all …]
|
| /linux/include/linux/platform_data/ |
| H A D | dma-dw.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (C) 2010-2011 ST Microelectronics
22 * struct dw_dma_slave - Controller-specific information about a slave
27 * @m_master: memory master for transfers on allocated channel
28 * @p_master: peripheral master for transfers on allocated channel
43 * struct dw_dma_platform_data - Controller configuration parameters
47 * @chan_priority: Set channel priority increasing from 0 to 7 or 7 to 0.
51 * @multi_block: Multi block transfers supported by hardware per channel.
53 * per channel (in units of CTL.SRC_TR_WIDTH/CTL.DST_TR_WIDTH).
54 * @protctl: Protection control signals setting per channel.
|