Home
last modified time | relevance | path

Searched full:master (Results 1 – 25 of 2104) sorted by relevance

12345678910>>...85

/linux/drivers/fsi/
H A Dfsi-master-ast-cf.c4 * A FSI master based on Aspeed ColdFire coprocessor
25 #include "fsi-master.h"
88 struct fsi_master master; member
120 #define to_fsi_master_acf(m) container_of(m, struct fsi_master_acf, master)
159 static bool check_same_address(struct fsi_master_acf *master, int id, in check_same_address() argument
163 return master->last_addr == (((id & 0x3) << 21) | (addr & ~0x3)); in check_same_address()
166 static bool check_relative_address(struct fsi_master_acf *master, int id, in check_relative_address() argument
169 uint32_t last_addr = master->last_addr; in check_relative_address()
196 static void last_address_update(struct fsi_master_acf *master, in last_address_update() argument
200 master->last_addr = LAST_ADDR_INVALID; in last_address_update()
[all …]
H A Dfsi-master-gpio.c3 * A FSI master controller, using a simple GPIO bit-banging interface
18 #include "fsi-master.h"
24 struct fsi_master master; member
42 #define to_fsi_master_gpio(m) container_of(m, struct fsi_master_gpio, master)
49 static void clock_toggle(struct fsi_master_gpio *master, int count) in clock_toggle() argument
54 if (!master->no_delays) in clock_toggle()
56 gpiod_set_value(master->gpio_clk, 0); in clock_toggle()
57 if (!master->no_delays) in clock_toggle()
59 gpiod_set_value(master->gpio_clk, 1); in clock_toggle()
63 static int sda_clock_in(struct fsi_master_gpio *master) in sda_clock_in() argument
[all …]
H A Dfsi-core.c27 #include "fsi-master.h"
97 static int fsi_master_read(struct fsi_master *master, int link,
99 static int fsi_master_write(struct fsi_master *master, int link,
101 static int fsi_master_break(struct fsi_master *master, int link);
252 struct fsi_master *master = slave->master; in fsi_slave_report_and_clear_errors() local
260 rc = fsi_master_read(master, link, id, FSI_SLAVE_BASE + FSI_SISC, in fsi_slave_report_and_clear_errors()
265 rc = fsi_master_read(master, link, id, FSI_SLAVE_BASE + FSI_SSTAT, in fsi_slave_report_and_clear_errors()
274 return fsi_master_write(master, link, id, FSI_SLAVE_BASE + FSI_SISC, in fsi_slave_report_and_clear_errors()
321 return fsi_master_write(slave->master, slave->link, slave->id, in fsi_slave_set_smode()
329 struct fsi_master *master = slave->master; in fsi_slave_handle_error() local
[all …]
H A Dfsi-master-hub.c3 * FSI hub master driver
14 #include "fsi-master.h"
21 * FSI hub master support
23 * A hub master increases the number of potential target devices that the
24 * primary FSI master can access. For each link a primary master supports,
25 * each of those links can in turn be chained to a hub master with multiple
37 struct fsi_master master; member
40 /* master address space */
43 #define to_fsi_master_hub(m) container_of(m, struct fsi_master_hub, master)
45 static int hub_master_read(struct fsi_master *master, int link, in hub_master_read() argument
[all …]
H A DKconfig32 tristate "GPIO-based FSI master"
36 This option enables a FSI master driver using GPIO lines.
39 tristate "FSI hub master"
41 This option enables a FSI hub master driver. Hub is a type of FSI
42 master that is connected to the upstream master via a slave. Hubs
47 tristate "FSI master based on Aspeed ColdFire coprocessor"
52 This option enables a FSI master using the AST2400 and AST2500 GPIO
57 tristate "FSI ASPEED master"
60 This option enables a FSI master that is present behind an OPB bridge
66 tristate "IBM I2C Responder virtual FSI master"
[all …]
H A Dfsi-master.h3 * FSI master definitions. These comprise the core <--> master interface,
16 * Master registers
19 * the hub master in POWER processors.
31 #define FSI_MVER 0x74 /* R: master version/type */
34 #define FSI_MESRB0 0x1d0 /* R: Master error status */
36 #define FSI_MSCSB0 0x1d4 /* R: Master sub command stack */
37 #define FSI_MATRB0 0x1d8 /* R: Master address trace */
38 #define FSI_MDTRB0 0x1dc /* R: Master data trace */
61 #define FSI_MRESP_RST_MCR 0x08000000 /* Reset FSI master reg. */
67 /* master 0 in error */
[all …]
/linux/drivers/clk/at91/
H A Dclk-master.c46 static inline bool clk_master_ready(struct clk_master *master) in clk_master_ready() argument
48 unsigned int bit = master->id ? AT91_PMC_MCKXRDY : AT91_PMC_MCKRDY; in clk_master_ready()
51 regmap_read(master->regmap, AT91_PMC_SR, &status); in clk_master_ready()
58 struct clk_master *master = to_clk_master(hw); in clk_master_prepare() local
61 spin_lock_irqsave(master->lock, flags); in clk_master_prepare()
63 while (!clk_master_ready(master)) in clk_master_prepare()
66 spin_unlock_irqrestore(master->lock, flags); in clk_master_prepare()
73 struct clk_master *master = to_clk_master(hw); in clk_master_is_prepared() local
77 spin_lock_irqsave(master->lock, flags); in clk_master_is_prepared()
78 status = clk_master_ready(master); in clk_master_is_prepared()
[all …]
/linux/include/trace/events/
H A Dfsi_master_gpio.h12 TP_PROTO(const struct fsi_master_gpio *master, int bits, uint64_t msg),
13 TP_ARGS(master, bits, msg),
20 __entry->master_idx = master->master.idx;
33 TP_PROTO(const struct fsi_master_gpio *master, int bits, uint64_t msg),
34 TP_ARGS(master, bits, msg),
41 __entry->master_idx = master->master.idx;
54 TP_PROTO(const struct fsi_master_gpio *master, int clocks),
55 TP_ARGS(master, clocks),
61 __entry->master_idx = master->master.idx;
70 TP_PROTO(const struct fsi_master_gpio *master),
[all …]
H A Dfsi_master_ast_cf.h11 TP_PROTO(const struct fsi_master_acf *master, uint32_t op),
12 TP_ARGS(master, op),
18 __entry->master_idx = master->master.idx;
27 TP_PROTO(const struct fsi_master_acf *master, const struct fsi_msg *cmd, u8 rbits),
28 TP_ARGS(master, cmd, rbits),
36 __entry->master_idx = master->master.idx;
48 TP_PROTO(const struct fsi_master_acf *master, u8 rtag, u8 rcrc, __be32 rdata, bool crc_ok),
49 TP_ARGS(master, rtag, rcrc, rdata, crc_ok),
58 __entry->master_idx = master->master.idx;
71 TP_PROTO(const struct fsi_master_acf *master, int retries),
[all …]
H A Dfsi.h12 TP_PROTO(const struct fsi_master *master, int link, int id,
14 TP_ARGS(master, link, id, addr, size),
23 __entry->master_idx = master->idx;
39 TP_PROTO(const struct fsi_master *master, int link, int id,
41 TP_ARGS(master, link, id, addr, size, data),
51 __entry->master_idx = master->idx;
70 TP_PROTO(const struct fsi_master *master, int link, int id,
73 TP_ARGS(master, link, id, addr, size, write, data, ret),
85 __entry->master_idx = master->idx;
109 TP_PROTO(const struct fsi_master *master, int link),
[all …]
/linux/sound/core/
H A Dvmaster.c3 * Virtual master and follower controls
24 * link master - this contains a list of follower controls that are
28 * The master control is so far only mono volume/switch for simplicity.
34 int val; /* the master value */
44 * master control. A follower may have either one or two channels.
49 struct link_master *master; member
108 /* initialize master volume */
109 static int master_init(struct link_master *master) in master_init() argument
113 if (master->info.count) in master_init()
116 list_for_each_entry(follower, &master->followers, list) { in master_init()
[all …]
/linux/drivers/i3c/master/
H A Damd-i3c-master.c3 * I3C master driver for the AMD I3C controller.
14 #include <linux/i3c/master.h>
157 * struct xi3c_master - I3C master controller state.
158 * @base: I3C master controller embedded by the framework.
180 to_xi3c_master(struct i3c_master_controller *master) in to_xi3c_master() argument
182 return container_of(master, struct xi3c_master, base); in to_xi3c_master()
185 static inline u8 xi3c_get_revision_number(struct xi3c_master *master) in xi3c_get_revision_number() argument
188 ioread32(master->membase + XI3C_VERSION_OFFSET)); in xi3c_get_revision_number()
191 static inline u16 xi3c_wr_fifo_level(struct xi3c_master *master) in xi3c_wr_fifo_level() argument
193 return ioread32(master->membase + XI3C_FIFO_LVL_STATUS_OFFSET) & in xi3c_wr_fifo_level()
[all …]
/linux/drivers/gpu/drm/
H A Ddrm_lease.c21 * DRM leases provide information about whether a DRM master may control a DRM
25 * The original DRM master of a device 'owns' the available drm resources. It
27 * to the new DRM master. This gives the new DRM master control over the
28 * leased resources until the owner revokes the lease, or the new DRM master
62 * through the SETMASTER or DROPMASTER IOCTL, so &drm_device.master points to
74 struct drm_master *drm_lease_owner(struct drm_master *master) in drm_lease_owner() argument
76 while (master->lessor != NULL) in drm_lease_owner()
77 master = master->lessor; in drm_lease_owner()
78 return master; in drm_lease_owner()
82 _drm_find_lessee(struct drm_master *master, int lessee_id) in _drm_find_lessee() argument
[all …]
/linux/drivers/base/regmap/
H A Dregmap-w1.c30 mutex_lock(&sl->master->bus_mutex); in w1_reg_a8_v8_read()
32 w1_write_8(sl->master, W1_CMD_READ_DATA); in w1_reg_a8_v8_read()
33 w1_write_8(sl->master, reg); in w1_reg_a8_v8_read()
34 *val = w1_read_8(sl->master); in w1_reg_a8_v8_read()
38 mutex_unlock(&sl->master->bus_mutex); in w1_reg_a8_v8_read()
52 mutex_lock(&sl->master->bus_mutex); in w1_reg_a8_v8_write()
54 w1_write_8(sl->master, W1_CMD_WRITE_DATA); in w1_reg_a8_v8_write()
55 w1_write_8(sl->master, reg); in w1_reg_a8_v8_write()
56 w1_write_8(sl->master, val); in w1_reg_a8_v8_write()
60 mutex_unlock(&sl->master->bus_mutex); in w1_reg_a8_v8_write()
[all …]
/linux/drivers/i2c/busses/
H A Di2c-qcom-cci.c109 u16 master; member
130 struct cci_master master[NUM_MASTERS]; member
144 complete(&cci->master[0].irq_complete); in cci_isr()
145 if (cci->master[1].master) in cci_isr()
146 complete(&cci->master[1].irq_complete); in cci_isr()
153 cci->master[0].status = 0; in cci_isr()
154 complete(&cci->master[0].irq_complete); in cci_isr()
161 cci->master[1].status = 0; in cci_isr()
162 complete(&cci->master[1].irq_complete); in cci_isr()
182 cci->master[0].status = -ENXIO; in cci_isr()
[all …]
/linux/Documentation/devicetree/bindings/iommu/
H A Diommu.txt2 master(s).
29 IOMMUs can be single-master or multiple-master. Single-master IOMMU devices
30 typically have a fixed association to the master device, whereas multiple-
31 master IOMMU devices can translate accesses from more than one master.
46 - #iommu-cells = <0>: Single master IOMMU devices are not configurable and
48 This may also apply to multiple master IOMMU devices that do not allow the
50 be multi-master yet only expose a single master in a given configuration.
52 - #iommu-cells = <1>: Multiple master IOMMU devices may need to be configured
53 in order to enable translation for a given master. In such cases the single
54 address cell corresponds to the master device's ID. In some cases more than
[all …]
/linux/arch/arm/mach-omap2/
H A Domap_hwmod_2xxx_interconnect_data.c25 .master = &omap2xxx_l3_main_hwmod,
32 .master = &omap2xxx_mpu_hwmod,
39 .master = &omap2xxx_dss_core_hwmod,
52 .master = &omap2xxx_l4_core_hwmod,
59 .master = &omap2xxx_l4_core_hwmod,
67 .master = &omap2xxx_l4_core_hwmod,
75 .master = &omap2xxx_l4_core_hwmod,
83 .master = &omap2xxx_l4_core_hwmod,
91 .master = &omap2xxx_l4_core_hwmod,
99 .master = &omap2xxx_l4_core_hwmod,
[all …]
/linux/net/sched/
H A Dsch_teql.c137 struct teql_master *master = dat->m; in teql_destroy() local
141 if (!master) in teql_destroy()
144 spin_lock_bh(&master->slaves_lock); in teql_destroy()
145 prev = rcu_dereference_protected(master->slaves, in teql_destroy()
146 lockdep_is_held(&master->slaves_lock)); in teql_destroy()
152 lockdep_is_held(&master->slaves_lock)); in teql_destroy()
159 lockdep_is_held(&master->slaves_lock)); in teql_destroy()
162 head = rcu_dereference_protected(master->slaves, in teql_destroy()
163 lockdep_is_held(&master->slaves_lock)); in teql_destroy()
165 rcu_assign_pointer(master in teql_destroy()
307 struct teql_master *master = netdev_priv(dev); teql_master_xmit() local
491 struct teql_master *master = netdev_priv(dev); teql_master_setup() local
529 struct teql_master *master; teql_init() local
561 struct teql_master *master, *nxt; teql_exit() local
[all...]
/linux/Documentation/scsi/
H A Dadvansys.rst21 - ABP-480 - Bus-Master CardBus (16 CDB)
24 - ABP510/5150 - Bus-Master ISA (240 CDB)
25 - ABP5140 - Bus-Master ISA PnP (16 CDB)
26 - ABP5142 - Bus-Master ISA PnP with floppy (16 CDB)
27 - ABP902/3902 - Bus-Master PCI (16 CDB)
28 - ABP3905 - Bus-Master PCI (16 CDB)
29 - ABP915 - Bus-Master PCI (16 CDB)
30 - ABP920 - Bus-Master PCI (16 CDB)
31 - ABP3922 - Bus-Master PCI (16 CDB)
32 - ABP3925 - Bus-Master PCI (16 CDB)
[all …]
/linux/drivers/mtd/
H A Dmtdcore.c514 struct mtd_info *master = mtd_get_master(mtd); in mtd_wunit_to_pairing_info() local
515 int npairs = mtd_wunit_per_eb(master) / mtd_pairing_groups(master); in mtd_wunit_to_pairing_info()
520 if (master->pairing && master->pairing->get_info) in mtd_wunit_to_pairing_info()
521 return master->pairing->get_info(master, wunit, info); in mtd_wunit_to_pairing_info()
557 struct mtd_info *master = mtd_get_master(mtd); in mtd_pairing_info_to_wunit() local
558 int ngroups = mtd_pairing_groups(master); in mtd_pairing_info_to_wunit()
559 int npairs = mtd_wunit_per_eb(master) / ngroups; in mtd_pairing_info_to_wunit()
565 if (master->pairing && master->pairing->get_wunit) in mtd_pairing_info_to_wunit()
566 return mtd->pairing->get_wunit(master, info); in mtd_pairing_info_to_wunit()
584 struct mtd_info *master = mtd_get_master(mtd); in mtd_pairing_groups() local
[all …]
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-soundwire-master1 What: /sys/bus/soundwire/devices/sdw-master-<N>/revision
2 /sys/bus/soundwire/devices/sdw-master-<N>/clk_stop_modes
3 /sys/bus/soundwire/devices/sdw-master-<N>/clk_freq
4 /sys/bus/soundwire/devices/sdw-master-<N>/clk_gears
5 /sys/bus/soundwire/devices/sdw-master-<N>/default_col
6 /sys/bus/soundwire/devices/sdw-master-<N>/default_frame_rate
7 /sys/bus/soundwire/devices/sdw-master-<N>/default_row
8 /sys/bus/soundwire/devices/sdw-master-<N>/dynamic_shape
9 /sys/bus/soundwire/devices/sdw-master-<N>/err_threshold
10 /sys/bus/soundwire/devices/sdw-master-<N>/max_clk_freq
[all …]
/linux/drivers/w1/slaves/
H A Dw1_ds2408.c48 mutex_lock(&sl->master->bus_mutex); in _read_reg()
52 mutex_unlock(&sl->master->bus_mutex); in _read_reg()
59 w1_write_block(sl->master, wrbuf, 3); in _read_reg()
60 *buf = w1_read_8(sl->master); in _read_reg()
62 mutex_unlock(&sl->master->bus_mutex); in _read_reg()
144 if (w1_reset_resume_command(sl->master)) in optional_read_back_valid()
151 w1_write_block(sl->master, w1_buf, 3); in optional_read_back_valid()
153 return (w1_read_8(sl->master) == expected); in optional_read_back_valid()
175 mutex_lock(&sl->master->bus_mutex); in output_write()
186 w1_write_block(sl->master, w1_buf, 3); in output_write()
[all …]
/linux/tools/testing/selftests/drivers/net/mlxsw/
H A Dvxlan.sh59 ip link set dev $swp1 master br0
61 ip link set dev vxlan0 master br0
66 ip link set dev $swp1 master br0
72 ip link set dev $swp1 master br0
74 ip link set dev vxlan0 master br0 &> /dev/null
79 ip link set dev vxlan0 master br0
81 ip link set dev $swp1 master br0 &> /dev/null
297 ip link set dev $swp1 master br0
299 ip link set dev vxlan0 master br0
301 ip link set dev $swp2 master br1
[all …]
/linux/drivers/iommu/arm/arm-smmu-v3/
H A Darm-smmu-v3-iommufd.c13 struct arm_smmu_master *master = dev_iommu_priv_get(dev); in arm_smmu_hw_info() local
14 const struct arm_smmu_impl_ops *impl_ops = master->smmu->impl_ops; in arm_smmu_hw_info()
23 return impl_ops->hw_info(master->smmu, length, type); in arm_smmu_hw_info()
30 base_idr = master->smmu->base + ARM_SMMU_IDR0; in arm_smmu_hw_info()
33 info->iidr = readl_relaxed(master->smmu->base + ARM_SMMU_IIDR); in arm_smmu_hw_info()
34 info->aidr = readl_relaxed(master->smmu->base + ARM_SMMU_AIDR); in arm_smmu_hw_info()
46 struct arm_smmu_ste *target, struct arm_smmu_master *master, in arm_smmu_make_nested_cd_table_ste() argument
50 target, master, nested_domain->vsmmu->s2_parent, ats_enabled); in arm_smmu_make_nested_cd_table_ste()
71 struct arm_smmu_ste *target, struct arm_smmu_master *master, in arm_smmu_make_nested_domain_ste() argument
87 arm_smmu_make_nested_cd_table_ste(target, master, nested_domain, in arm_smmu_make_nested_domain_ste()
[all …]
/linux/Documentation/devicetree/bindings/fsi/
H A Dfsi.txt8 that is an I2C master - the I2C bus can be described by the device tree under
11 FSI masters may require their own DT nodes (to describe the master HW itself);
12 that requirement is defined by the master's implementation, and is described by
13 the fsi-master-* binding specifications.
18 fsi-master {
19 /* top-level of FSI bus topology, bound to an FSI master driver and
46 FSI master nodes declare themselves as such with the "fsi-master" compatible
50 compatible = "fsi-master-gpio", "fsi-master";
52 Since the master nodes describe the top-level of the FSI topology, they also
59 An optional boolean property can be added to indicate that a particular master
[all …]

12345678910>>...85