Searched full:mmus (Results 1 – 18 of 18) sorted by relevance
13 Samsung's Exynos architecture contains System MMUs that enables scattered23 System MMUs are in many to one relation with peripheral devices, i.e. single24 peripheral device might have multiple System MMUs (usually one for each bus30 MMUs.
6 KASAN is supported on both hash and nohash MMUs on 32-bit.
164 - 緩存，MMUs
164 - 缓存，MMUs
9 * notes on SH-X2 MMUs and 64-bit PTEs):30 * SH-X2 MMUs and extended PTEs
213 - Caches, MMUs
68 * MMUs on successive invalidate calls, we need to first do a in tlb_invalidate()70 * register. MMUs which need to implement this WA, will have in tlb_invalidate()
176 * In some of the IPU6 MMUs, there is provision to configure L1 and L2 page
59 and need the same programming in both the MMUs.
45 * with IO MMUs for PCI.
227 all MMUs specified in mmu_cap_mask.
297 /* All KVM MMUs should be able to survive a 128gb guest. */ in main()
335 * The Book E MMUs are always on so we don't need to handle
235 * The Book E MMUs are always on so we don't need to handle
1112 * restrict IOMMU core registration only for processor-port MDMA MMUs in omap_iommu_can_register()
1693 * architectures with IO MMUs).
496 * down MMUs, or to mark the VM dead if a KVM_BUG_ON() fires. in kvm_destroy_vcpus() 750 * Invalidate pfn caches _before_ invalidating the secondary MMUs, i.e. in kvm_mmu_notifier_invalidate_range_start()
8181 /* configure DCORE MMUs */ in gaudi2_mmu_prepare()