/linux/drivers/pwm/ |
H A D | pwm-lpc32xx.c | 33 struct lpc32xx_pwm_chip *lpc32xx = to_lpc32xx_pwm_chip(chip); in lpc32xx_pwm_config() local 37 c = clk_get_rate(lpc32xx->clk); in lpc32xx_pwm_config() 55 val = readl(lpc32xx->base); in lpc32xx_pwm_config() 58 writel(val, lpc32xx->base); in lpc32xx_pwm_config() 65 struct lpc32xx_pwm_chip *lpc32xx = to_lpc32xx_pwm_chip(chip); in lpc32xx_pwm_enable() local 69 ret = clk_prepare_enable(lpc32xx->clk); in lpc32xx_pwm_enable() 73 val = readl(lpc32xx->base); in lpc32xx_pwm_enable() 75 writel(val, lpc32xx->base); in lpc32xx_pwm_enable() 82 struct lpc32xx_pwm_chip *lpc32xx = to_lpc32xx_pwm_chip(chip); in lpc32xx_pwm_disable() local 85 val = readl(lpc32xx->base); in lpc32xx_pwm_disable() [all …]
|
/linux/arch/arm/mach-lpc32xx/ |
H A D | common.c | 3 * arch/arm/mach-lpc32xx/common.c 11 #include <linux/soc/nxp/lpc32xx-misc.h> 16 #include "lpc32xx.h" 115 printk(KERN_INFO "LPC32XX unique ID: %08x%08x%08x%08x\n", in lpc32xx_check_uid()
|
H A D | pm.c | 3 * arch/arm/mach-lpc32xx/pm.c 12 * LPC32XX CPU and system power management 14 * The LPC32XX has three CPU modes for controlling system power: run, 71 #include "lpc32xx.h"
|
H A D | Kconfig | 4 bool "NXP LPC32XX" 13 Support for the NXP LPC32XX family of processors
|
H A D | common.h | 3 * arch/arm/mach-lpc32xx/common.h 22 * Returns the LPC32xx unique 128-bit chip ID
|
H A D | serial.c | 3 * arch/arm/mach-lpc32xx/serial.c 18 #include <linux/soc/nxp/lpc32xx-misc.h> 20 #include "lpc32xx.h"
|
H A D | phy3250.c | 3 * Platform support for LPC32xx SoC 87 DT_MACHINE_START(LPC32XX_DT, "LPC32XX SoC (Flattened Device Tree)")
|
H A D | suspend.S | 3 * arch/arm/mach-lpc32xx/suspend.S 12 #include "lpc32xx.h"
|
/linux/Documentation/devicetree/bindings/sound/ |
H A D | nxp,lpc3220-i2s.yaml | 7 title: NXP LPC32XX I2S Controller 10 The I2S controller in LPC32XX SoCs, ASoC DAI. 60 #include <dt-bindings/clock/lpc32xx-clock.h>
|
/linux/drivers/iio/adc/ |
H A D | lpc32xx_adc.c | 3 * lpc32xx_adc.c - Support for ADC in LPC32XX 23 * LPC32XX registers definitions 46 #define LPC32XXAD_NAME "lpc32xx-adc" 213 dev_info(&pdev->dev, "LPC32XX ADC driver loaded, IRQ %d\n", irq); in lpc32xx_adc_probe() 235 MODULE_DESCRIPTION("LPC32XX ADC driver");
|
/linux/Documentation/devicetree/bindings/arm/nxp/ |
H A D | lpc32xx.yaml | 4 $id: http://devicetree.org/schemas/arm/nxp/lpc32xx.yaml# 7 title: NXP LPC32xx Platforms
|
/linux/Documentation/devicetree/bindings/net/ |
H A D | lpc-eth.txt | 1 * NXP LPC32xx SoC Ethernet Controller 11 - use-iram: Use LPC32xx internal SRAM (IRAM) for DMA buffering
|
/linux/Documentation/devicetree/bindings/timer/ |
H A D | nxp,lpc3220-timer.yaml | 14 LPC32xx, LPC178x, LPC18xx and LPC43xx parts. 46 #include <dt-bindings/clock/lpc32xx-clock.h>
|
/linux/Documentation/devicetree/bindings/input/ |
H A D | lpc32xx-key.txt | 1 NXP LPC32xx Key Scan Interface 19 since LPC32xx only supports square matrices
|
/linux/include/dt-bindings/clock/ |
H A D | lpc32xx-clock.h | 15 /* LPC32XX System Control Block clocks */ 53 /* LPC32XX USB clocks */
|
/linux/Documentation/devicetree/bindings/mtd/ |
H A D | lpc32xx-mlc.txt | 1 NXP LPC32xx SoC NAND MLC controller 9 The following required properties are very controller specific. See the LPC32xx
|
H A D | lpc32xx-slc.txt | 1 NXP LPC32xx SoC NAND SLC controller 9 The following required properties are very controller specific. See the LPC32xx
|
/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | nxp,lpc3220-mic.txt | 1 * NXP LPC32xx MIC, SIC1 and SIC2 Interrupt Controllers 22 /* LPC32xx MIC, SIC1 and SIC2 interrupt controllers */
|
/linux/drivers/input/touchscreen/ |
H A D | lpc32xx_ts.c | 3 * LPC32xx built-in touchscreen driver 57 #define MOD_NAME "ts-lpc32xx" 234 input->phys = "lpc32xx/input0"; in lpc32xx_ts_probe() 343 MODULE_DESCRIPTION("LPC32XX TSC Driver");
|
/linux/drivers/rtc/ |
H A D | rtc-lpc32xx.c | 349 .name = "rtc-lpc32xx", 358 MODULE_DESCRIPTION("RTC driver for the LPC32xx SoC"); 360 MODULE_ALIAS("platform:rtc-lpc32xx");
|
/linux/drivers/mtd/nand/raw/ |
H A D | Kconfig | 166 tristate "NXP LPC32xx SLC NAND controller" 170 Enables support for NXP's LPC32XX SLC (i.e. for Single Level Cell 178 tristate "NXP LPC32xx MLC NAND controller" 182 Uses the LPC32XX MLC (i.e. for Multi Level Cell chips) NAND
|
/linux/drivers/input/keyboard/ |
H A D | lpc32xx-keys.c | 3 * NXP LPC32xx SoC Key Scan Interface 195 input->phys = "lpc32xx/input0"; in lpc32xx_kscan_probe() 320 MODULE_DESCRIPTION("Key scanner driver for LPC32XX devices");
|
/linux/include/linux/mtd/ |
H A D | lpc32xx_mlc.h | 3 * Platform data for LPC32xx SoC MLC NAND controller
|
H A D | lpc32xx_slc.h | 3 * Platform data for LPC32xx SoC SLC NAND controller
|
/linux/drivers/clk/nxp/ |
H A D | Makefile | 5 obj-$(CONFIG_ARCH_LPC32XX) += clk-lpc32xx.o
|